Being unable to test before bonding out would make the whole concept of redundancy in chip-design obsolete.
Try reading what I wrote again but more slowly. I didn't say it would be impossible to test HT at all at wafer sort, I said it was probably impossible to achieve comprehensive parametric testing at wafer sort.
Some things are easy to test at wafer sort and other things are very difficult if not impossible. The purpose of wafer sort is to quickly check for easy to check things that indicate a defective die. Redundancy is usually used with functions like on-chip memory that are relatively easy to check and diagnose at wafer sort. I don't think HT links will fall in that category.