Replies to post #33538 on Intel Corp (INTC)

[chipguy]

I am quite clueless on the technical aspects of CSI. Does anybody know if CSI will somehow prevent Intel from easily creating these MCM dual-core modules once they transition over to this new bus topology? Will it be easier or harder to do this than it is with an FSB topology?

CSI will work across large PWBs and possibly (like EV7 links)
between PWBs. Operation within an MCM should be a cake
walk if somewhat overkill.

MCMs have been around a long time - Intel used them for the
Pentium Pro. There are advantages and disadvantages to
its use vs monolothic devices. In general monolothic is better
for very high volume, entry level devices while MCM is good
for time to market and for thermally challenged CPU counts
in a given technology.

[Tenchu]

ChipGeek, Does anybody know if CSI will somehow prevent Intel from easily creating these MCM dual-core modules once they transition over to this new bus topology? Will it be easier or harder to do this than it is with an FSB topology?

It will be harder and impractical for the following reasons:

a) Intel will integrate the memory controller into the CPU, just like AMD. An MCM will have to add pins for an additional memory interface.

b) With an FSB, there is a benefit from moving two CPU dies onto the same package, as the FSB "glue" can run faster in an MCM than on the board. With CSI, there is very little benefit as I can't imagine the CSI "glue" running any faster in an MCM than on the board.

But by the time we get to CSI, the "core war" will be over as the mainstream will be wondering what they are going to do with more than four cores on the CPU.

Trust me, HT and CSI is a better long-term solution than FSB, but as long as Intel is stuck with the FSB, they might as well turn lemons into lemonade.

Tenchu

[wbmw]

Re: It's no secret that Intel's first MCM dual-core chip, Smithfield, was a day late and a dollar short

Smithfield was an underperformer, but as a design, Intel's engineering teams executed extraordinarily well. To understand this, you have to consider the start times for these projects. AMD started mentioning dual core ever since they launched the first Opteron in H1 2003, where they planned for an H2 2005 launch (though this was not stated at the time). Intel, however, had Tejas planned for 2005, and likely hadn't started Smithfield until the Tejas project was officially canned (internally, this must have been H1 2004).

So in one year, Intel managed to get a dual core to market, while AMD took several. In fact, in the last leg of the race, both Intel and AMD started pulling in schedules, managing to get both cores to launch within a week of one another in Q2 2005. That's record time for Intel as far as design cycles go.

Ever since then, Intel's schedules have been on or ahead of target. It's only now that the products are competitive that people are finally giving them credit for this.