Intel Corp (INTC)

[Tenchu]

ChipGeek, Does anybody know if CSI will somehow prevent Intel from easily creating these MCM dual-core modules once they transition over to this new bus topology? Will it be easier or harder to do this than it is with an FSB topology?

It will be harder and impractical for the following reasons:

a) Intel will integrate the memory controller into the CPU, just like AMD. An MCM will have to add pins for an additional memory interface.

b) With an FSB, there is a benefit from moving two CPU dies onto the same package, as the FSB "glue" can run faster in an MCM than on the board. With CSI, there is very little benefit as I can't imagine the CSI "glue" running any faster in an MCM than on the board.

But by the time we get to CSI, the "core war" will be over as the mainstream will be wondering what they are going to do with more than four cores on the CPU.

Trust me, HT and CSI is a better long-term solution than FSB, but as long as Intel is stuck with the FSB, they might as well turn lemons into lemonade.

Tenchu