GAPS & SHOW-STOPPERS Gaps and Show Stoppers for Interconnects exist primarily in being able to reduce cost 2:1 to 5:1 in relatively mature technologies. The industry would need HVM applications in the 100s of thousands to millions, with a stable market in order to automate these designs.
Interconnect Technology Hurdles are doable IF volume applications exist with OEM buy-in. However, there is a tendency by large OEMs to ‘own’ all technologies in their proprietary designs. This transcends any desire to keep the technology domestic and ‘open’
The biggest interconnect question mark has to do with the timing of transition from Cu signaling to Photonics at the Chip, Package and Board Level of Datacom and Computer/Server/Storage equipment. The IO port and < 1km cabling are already covered. FO Backplane and Cable connectors already exist in both MM and SM designs. The key may be in 4 stages over the next 2 decades:
1. 2015-18: Existing hodge-podge of proprietary, company-specific and standard interconnect designs, which do fulfill existing applications, if at a high cost. Existing Above Board Optical Fiber Interconnect, mostly MM with no Waveguides. Cu designs such as Intel’s OCA system for data center applications up to 100Gbps at 3m will continue and probably delay full implementation of fiber-based systems. This has been proven out over years of constant improvements in metallic circuitry, and there is no reason to expect otherwise.
2. 2018-20: Evolution of Standards based on an interim Hybrid Approach to Photonic Chip Packaging, not too dissimilar than what exists today with InP Transceivers. First Use of SM in electronic packaging w/ discrete hybrid Transceivers. First Use of Embedded Waveguides with Peripheral Interconnect and SM Connectors and Cables.
3. 2020-25: Heterogeneous SiPh solutions with advanced 3D Packaging. Embedded Waveguides w/Surface-Level Interconnects MM and some SM inside the box. Some of this will happen sooner.
4. 2025-35: Monolithic Integration resulting in Single Chip or Complex 3D Chip Solutions with Minimal Outboard photonics Interconnect at the System Level. Interconnect will be Primarily Between Equipment and Networks. SM Optical Fiber and Waveguides will be used to IO port and beyond. There is evidence of Monolithic SiPh commercialized before 2025.
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