Replies to post #9860 on Advanced Micro Devices Inc (AMD)

[Elmer Phud]

burn2learn - for an agressive process (or product)
1. LE (poly targeting losses to get speed) can be >50%
2. defects ~ 10-15%
3. excursions depends how bad and how long until contained


Thanks for your estimate. This is exactly what I have been trying to get across about squeezing the last drop of frequency out of a process.

[wbmw]

b2l, can you explain to me the terms "excursions" and "le loss"? Thanks in advance.

[kpf]

burn2learn -

Thanks for clarifying a lot.
Humble questions to start with: What do LE and FE stand for?
Could you elaborate for me what excursions are (if possible like you would explain it to an eight year old girl)

Then, assuming both Intel and AMD run aggressive and non agressive processes, would you agree?

Your estimate on yield loss of 5-10 die per metal layer; assuming this is based on 200mm wafers that would make 40-80 dies for AMDs process (eight metal layers, correct?)
or something like 1/4 lost dies per wafer for metal-layer deficiencies.
This pretty exactly fills the gap between yield-models based on defects and capacities/output together with your other comments on losses.

K.