Re: he was simply creating an analogy of how ludicrous it was for Murphy to say that the output data driver was coupled to the external clock.
I don't find it ludicrous at all. Fact is, the output data driver is coupled to the external clock. Hynix databook clearly shows this connection. Furniss wants to make it sound absurd by having to trudge through 5 pages of schematics to get through this signal path. That's nothing. I bet there's well over a 100 pages of schematics. In the old days a schematic showed lots of information/functions. These days schematics are broken down into much smaller sections, each having its own page.
Furness is making a big deal of the 5 pages. Stone should have asked how many pages of schematics are necessary to represent DDR.
If it is coupled to the clock, it is via a very complex set of circuitry, in my (OONSITA) opinion.
I see you bought into Hynix argument. I saw the 5 pages when Murphy went through the signal a couple weeks ago. I didn't see much complexity. And the argument of complexity shouldn't be an issue. If the data gets output as a result of a clock wiggle, then they are coupled. This is the basis of synchronized memory. Without that coupling, there's no synchronization. We're talking about the 'S' in SDRAM!
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