Advanced Micro Devices Inc (AMD)

[ChrisC_R]

Thanks for posting the link, mas. I thought this was most relevent to AMD's 65 nm future:

In technical session 3.3 at IEDM 2005, the IBM-Sony-Toshiba-AMD (ISTA) alliance disclosed some intriguing details about its high performance 65 nm SOI process..... The high performance 65 nm SOI process is said to contain advanced features such as four silicon stressors: the NMOS stress liner, the PMOS stress liner, stress memorization, and embedded SiGe...........

The reported Idsat drive currents are roughly comparable to those reported by Intel on its 65 nm high performance CMOS process when adjusted for the same Ioff leakage levels.... However, paper 10.5 states that the PMOS transistor drive current in the high performance SOI process can be further increased with improvements in the embedded SiGe integration technique. Since embedded SiGE is designed to provide compressive stress in PMOS transistors, it can only enhance the performance of PMOS transistors. Nevertheless, paper 10.5 reports that with successive improvements in SiGe integration, PMOS Idsat of 820 uA/um have been measured at Ioff of 200 nA/um. The increase in PMOS Idsat is the highest PMOS drive current reported to date, and the CV/I performance of 1.25 ps is also the best reported to date. As a result, the 65 nm SOI process from the ISTA alliance should be able to experience a quick jump in performance once the improvements in the embedded SiGe integration process are successfully introduced into the manufacturing process."

I have wondered before whether AMD's 65nm process was delayed due to the desire to utilize at least some of these advanced processes?