Rambus (RMBS)

[cordob]

A bit further into understanding this "microthreading" pse:

Current XDR would prefetch 512 bytes. (256 bytes on a 128 bit bus).

Does this mean, that by splitting (or multiplexing) the address bus into, say, four 32 bit wide memory busses we could get four separate triangles simultaneously from the four side by side parts of the memory? (assuming of course that the software is smart enough to put them spread out properly)

Or are we talking about a changed core of the memory chips as well?

How does NVIDEA do this now? It seems they could have four separate memory channels, each 32 bits wide anyway...

Cheers
Cor

PS Cal thks for the formula. I see you are preparing for all sorts of weather now that you know you cannot trust the 30 year averages any more