Intel Corp (INTC)

[Elmer Phud]

Mr Chin -

Thank you very much your highness Test Engineer-III!
I am delighted to have a wonderful opportunity to hear
your deeply insigntful explanations.

Now that you are sufficiently respectful, I will respond to your pleas for help.

I see, you masterfully were able to divide 2.5Gb/s by 10
to ensure the old 1983 IBM encoding scheme to work on
bytes. I would never be able to master such high skills
without your generous help.

I'm a very helpful guy! I enjoy teaching the uninformed.

But trying to comprehend your following train of thoughts, I am becoming increasingly confused.

I know. It happens alot for you.

Besides an impication that a high-flying Test Engineer-III
should care less about woes of some low-level punk designer,
you seem to imply that the 250MHz clock is certainly a part
of the PCI_Express specifications, by the way you are contrasting an ordinary 250MHz 8b/10b logic to apparently less-challenging over-gigaherz bit-stream conversion and data scrambling.

I am not suggesting that the 250MHz clock is a part of the PCI-Express specification. I am accounting for a 250MHz clock in the system. I am not trying to contrast the 250MHz logic as more challenging than 2.5GHz(or higher) logic. Quite the contrary.

Could you please point me to any place in PCI-Express Basic
(or Card) specifications where the 250MHz clock is ever
mentioned?

No I can't and I never said it was.

EP