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Wednesday, October 02, 2002 3:38:32 PM
I did not claim to have no industry knowledge. I did claim that I am not an industry insider, nor am I any kind of process engineer. My technical expertise lies elsewhere. I freely admit that I have only a rudimentary knowledge of how microprocessors are manufactured certainly in comparison to some of the very knowledgeable people who post here.
I got those numbers from Google and the AMD web site. Not that hard really.
I claim ignorance because I do not know how much of the Fab's capacity must be dedicated to both Hammer and Barton even though they are not in production. With the long lead times from raw wafers to final product, I would expect that some fraction of the tooling, instruments, floor space, or what have you must be dedicated to those lines. I do not know what that fraction is. You say it is insignificant. Can you provide a reasonable estimate and some reasonable basis for that estimate?
As for the "best yields in the world", I think that everyone knows that was Sanders hype. That quote is also 2 years old at least. There have been two shrinks since then. Who knows what kind of yields they are having now. You don't and neither do I. The best I can say is that yields are better than 37%.
The quote "normal yield contraints" has been taken out of context just about every time it has been quoted (or misquoted). That statement was in reference to the "B" revision of the Tbred. It is a new process and is, as others have pointed out, subject to the yield "contraints" that accompany any immature process.
I won't argue that Hammer is broken. The real question is how long will it take to fix it.
As for Barton, I suspect that it has been redesigned to incorporate the same changes as Tbred underwent - hence the delay.
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