Rim Semiconductor Company (fka RSMI)

[WTMHouston]

Edit x 2:

Based on what Excel has just posted, I am back to my inquiry of whether NVEI is at stage two and three rather than stage four?

http://www.investorshub.com/boards/read_msg.asp?message_id=516529

This would seem to indicate that they are at steps 2 and 3 -- they have "a" FPGA that someone called a "prototype," but are still in the process of developing "the" prototype -- but not yet at step 4 since the field "simulation" they did was not with a FPGA.

2) Develop a programmable prototype using off-the-shelf development hardware and software. This is typically done with programmable logic devices like FPGAs or CPLDs (Complex Programmable Logic Device). Once the prototype is done, go to step 3.

3) Test the prototype in a laboratory environment using line-simulation software and hardware. These simulations model the behavior or real-world lines. There are many such tools available. When the testing is being done, you can reprogram the FPGAs on the fly to address bugs, etc. When you are satisfied with the laboratory testing, go to step 4.

4) Test the prototype on an actual service loop. This is where the rubber meets the road. If the prototype works here, the final product will work as well. If the process is done correctly, the final product will do *exactly* what the FPGA prototype did. <-------- YOU ARE HERE.

Troy