Mas, Re: If at 3.6 Ghz, 1.4V input voltage and 105W tdp (p65) and Icc_tdc of 105A and Isgnt of 50A (p23) then say voltage is reduced by 0.25V, 20% that would give you for the same tdp a combined stop grant current of 80A with only say 30A dynamic current to be used between 2 cores, or 2 * 1 Ghz processors ! Say we up the tdp to say 130W that still only gives you 2 * 1.8 Ghz tops. If we say reduce the voltage by 30% (1V) that gives you 60A to play with at 130W tdp that's still only 2 * 2 Ghz processors. In all likelihood dual-core Prescott/Xeon will be outclocked by dual-core A64/Opteron at 90nm ! Not looking remotely good and excessive transistors and their leakage at 90nm is to blame.
A quick count shows that you used the word "say" in the context of groundless, SWAG data, on four separate occasions.
Mostly, you're missing an important fact that leakage will differ between chips, even those on the same wafer. 40A is the max, as defined in the spec. The average is much less. Given the theory of two adjacent die bundled together on the same package, Intel has the luxury to choose lower leakage parts, and use the rest as Prescotts.
It will probably cost them a couple speed bins, but it looks like holding a 95W power envelope is going to cost AMD a few speed bins themselves. Info at Fall Processor Forum suggested that the dual core Opteron will be between 3 and 5 speed bins below the top speed single core version. So if Opteron reaches 3.0GHz at 90nm, the dual core version will be between 2.0GHz and 2.4GHz.
By late next year when their process is fully mature, I expect Intel to be at 4.4GHz with Prescott and 3.2-3.4GHz with dual core at power levels somewhere above 100W, but less than 130W. It's silly to think that AMD's dual core will clock faster than Intel's, and it's even sillier to compare clock frequencies anyway. On a scale of pure performance, I think AMD is very well positioned - probably better off than they are now. I think Intel needs to get to 65nm, which I expect will lower power dissipation on Prescott chips considerably, and probably allow the dual core chips to clock to where the single core chips are capable at 90nm.
