X64 was pretty much a new architecture, and although it was a lot later to market than AMD intended, it came out the door in fairly good shape. My impression is that AMD was in weak shape during that development.
Is there something about the 'bulldozer' that makes it more difficult?
What you call "x64" is the 64 bit extension to the x86 ISA
or instruction set architecture. Opteron K8 and K10 has x64
support as well as Prescott P4, C2D, Atom, and Nehalem.
When I say microarchitecture it is the logical design of a
CPU core - how many instructions it can fetch, decode, and
issue for execution, how many functional units, the number
of pipeline stages, the design of the cache hierarchy, the
way branches are predicted, how much speculation can be
done etc. There are nearly an infinite number of ways to
design an x86 processor that implements x64 in today's
modern CMOS processes. The big trick is build something
that has a good combination of competitive maximum clock
frequency, good IPC across ALL important workloads, and
good computational power efficiency over a multiplicity of
voltage/frequency points for server, desktop, and laptop
device variants with compact die sizes to minimize their
manufacturing cost.
In my opinion the last "all new" microarchitecture AMD did
was the K7 and it was pretty damn good for its time. The
K8 enhanced the K7 with some changes to the front end and
added x64 support. The K10 enhanced the K8 with a bunch
of minor improvements of which the biggest was in the FPU.
The biggest improvement from K7 to K8 was the integration
of memory controller and HT links but that didn't involve
the processor core.
AMD has tried several times to move away from the basic
K7 design but those new microarchitectures failed badly
and AMD had to come back to to its K7 well again in order
to quickly come up with something to sell to keep paying
its ever rising bills. This approach of layer after layer of
band-aids has led AMD to the point where a two socket
Nehalem box beats a four socket Shanghai box in the vast
majority of benchmarks.
And look at AMD's best response to Nehalem that it could
come up with! - it stuck 2 more copies of the same tired
core design on a chip - that's Instanbul. Beckton will
show that Intel can play that game even better AND it
has a far better and more modern core design to base it
on.
Instanbul uses a three issue superscalar x86 core with
no multi-threading support and very limited ability to
re-order load and store operations. Dude, the 90's are
calling and they want their microarchitecture back!!!
The Nehalem core is four issue superscalar with support
for effective five wide issue in some cases, with SMT
support and extremely aggressive OOOE and load/store
re-ordering. That is what Intel has *now*. Really what
AMD needs is an all new microarchitecture, not a fourth
generation K7 retread, that will compete with what Intel
*will have* in 2011. Even if the financial game clock
wasn't rapidly running out on AMD I don't think they have
depth on their engineering players bench to take on this
huge challenge.
AI
