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Re: None

Friday, 02/06/2009 1:56:29 PM

Friday, February 06, 2009 1:56:29 PM

Post# of 249195
An FPGA home for device authentication?

http://www.edn.com/blog/890000689/post/1330040333.html

There are a variety of ASSPs that Verayo is developing, once the concept of challenge-response authentication gains traction. The concept might work well with the Trusted Computing Group's Trusted Platform Module, for example. If customers respond to the PUF architecture, FPGA vendors may be more willing to work with Verayo on hard macros. But in the meantime, Verayo can offer its security technology as a soft implementation method for existing FPGAs. This is interesting from a crypto and security perspective, but also from the perspective of developing new marketing channels for macros in the FPGA world.

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