AI
Saturday, June 26, 2004 8:36:15 PM
allman: And I did not intend to imply that...
...that you implied that only the XScale processor had embedded TPM functionality
I posted this more as evidence that the implementation of TPM functionality in new generation mobile processors like TI's OMAP, Motorola's IMX and Intel's XScale is indeed being pursued.
Did you know that ARM is a technology partner of SafeNet? ARM, with their TrustZone core architecture provides a secure execution environment. Intel's XScale is ARM code compatible, and that also applies to TI's OMAP and Motorola's IMX processors.
So, what do we have?
A complete system with secure execution environment and embedded TPM functionality. I think we'll see the Embassy OS, or a derivative of it, running on these processors in the not too distant future.
But I could be wrong...don't think so, though!
...that you implied that only the XScale processor had embedded TPM functionality
I posted this more as evidence that the implementation of TPM functionality in new generation mobile processors like TI's OMAP, Motorola's IMX and Intel's XScale is indeed being pursued.
Did you know that ARM is a technology partner of SafeNet? ARM, with their TrustZone core architecture provides a secure execution environment. Intel's XScale is ARM code compatible, and that also applies to TI's OMAP and Motorola's IMX processors.
So, what do we have?
A complete system with secure execution environment and embedded TPM functionality. I think we'll see the Embassy OS, or a derivative of it, running on these processors in the not too distant future.
But I could be wrong...don't think so, though!
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