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Re: fastpathguru post# 37608

Wednesday, 06/09/2004 2:38:08 PM

Wednesday, June 09, 2004 2:38:08 PM

Post# of 97833
fpg - What exactly do you take from it on how the 2 cores access the caches? Separate caches or unified? Seems to me a lot is left out of the diagram - maybe it's already been made obvious elsewhere, I don't recall.
Paul

Edit: Ops, stupid question - hadn't looked at the second diagram yet!

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