hy you think it's any harder to update a section of the processor that was designed from the get-go to be updated, as opposed to a discrete hub that has to be updated, too, is unclear to me.
I think it is maybe worse to have a separate hub as they would have to qualify another interface, qualify another chip, and create a more complex motherboard layout. The only place a hub would have a benefit is if the memory technologies were not backwards compatible. The transition from one type of memory to the next would be made easier as they wouldn't have to worry about managing the inventory of 2 incompatible CPUs. They would only have to manage the availability of the hub to match the demand for the various memory technologies. But since DDRII is backwards compatible with DDRI, they could just start making chips that support DDRII and be done, so the memory hub advantage does not apply.
Another thing I can think of is the memory hub can be done on a simpler technology, instead of the complex CPU technology. The benefit here is it takes about 12 weeks from wafer start to finished production for a CPU, but a memory hub chip would have a much shorter turnaround time. 12 weeks is a long time to wait for a potential bug fix to the memory interface.
I agree with the rest of you that AMD can easily make changes to the on die memory controller as long as they have the resources to do so. They used to be able to leave most of this work to 3rd parties like Via and Nvidia, and now it all has to be in house. Has AMD invested enough in this area to ensure they are pursuing DDRII in a timely manner? That is my question. I think they just stated 2H05, which to me is not too late to catch the wave, but any slip in this might be damaging.
