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Friday, November 30, 2007 10:21:05 PM
Sorry, the first question was worded strangely...
Are there any other issues apart for Bandwidth and Latency, which makes PCIe unsuited for processor to processor interconnect ?
<Shrug> I really have no idea. I honestly don't know much about PCIe. Off the top of my head, I would guess that PCIe isn't a point-to-point architecture, and thus not amenable to what the system architects were trying to achieve. I would also observe that "apart from Bandwidth and Latency" doesn't leave much else that matters...
Finally, Intel wanted to create an architecture that could live on and be scalable for the next 10+ years in all segments of the workstation and server market, for both x86 and IPF. Something based off PCIe would seem to be more of a stopgap.
Nehalem is just the tip of the Quickpath iceburg...
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