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Re: wbmw post# 22215

Thursday, 01/08/2004 3:05:27 AM

Thursday, January 08, 2004 3:05:27 AM

Post# of 97585
Do you really believe the stuff you are saying? That a 2 GHz chip will "fail due to thermal issues" if its Vcc is too low, or the clock speed is too low?

Show me in the spec where it says that the 2 GHz chip MUST spend > 1 nanosecond with a 1.4 volt supply, instead of a 1.2v supply or it will burn up.

Show me where it says that if you don't run it at 2 GHz, the chip will get lazy and start misbehaving.

Furthermore, as Pete Gerassi just showed me on the other thread, the AMD specs are far more conservative than the Intel specs because, for AMD, the total TDP is exactly equal to the product of Iccmax for all voltages and currents going into the chip.

For the Intel 1.7 GHz Pentium M, the total power supply requirements are OVER 38 WATTS, and to that we have to add 1.8W for the MCH chip that the AMD CPU does not need.

For the AMN3200BIX5AP running at Vccmax=1.2v, the total power supply requirements are 34 WATTS. For battery life, the issue is POWER CONSUMPTION, not thermal dissipation.

If you limit the voltage for the CPU, it will fail. It is not intelligent enough to stay out of the higher voltage modes, just because you limit the voltage.

WOW, those AMD CPUs are really quite amazing -- they can take a 1.2 volt power supply and, singlehandedly, raise its voltage to 1.4 volts! We have found the solution to the energy crisis in California! Tell Arnold!

In reality, changing the P-State on an Athlon 64 revision C or later is easy - here's how its done, from the BIOS and Kernel Developer guide:

To change the core frequency:
1. Write the following values to FIDVID_CTL (MSR C001_0041h):
– NewVID field (bits 12–8) with the CurrVID value reported in the FIDVID_STATUS MSR.
– NewFID field (bits 5–0) with the FID code associated with the target frequency.
– StpGntTOCnt field (bits 51–32) with a value corresponding to the processor PLL lock time.
The PLL locktime is specified by the processor data sheet and refers to all components of PLL lock including frequency lock, phase lock, and settling time. PLL lock time is communicated
to the processor driver through the PLL_LOCK_TIME field of the _PSS object. PLL locktime is in microseconds. To translate the PLL lock time to an StpGntTOCnt value, multiply PLL_LOCK_TIME by 1000 to get nanoseconds, then divide by 5 which is the clockperiod of the counter in ns. Therefore, StpGntTOCnt value = PLL_LOCK_TIME ∗1000/5. For example, a PLL lock time of 2 µs results in an StpGntTOCnt value of 400 decimal and 190h.
– InitFidVid bit (bit 16) set to 1. Setting this bit initiates the P-state transition.
– Clear all other bits to 0.
2. Loop on reading the FidVidPending bit (bit 31) of FIDVID_STATUS (MSR C001_0042h) until
the bit returns 0. The FidVidPending bit stays set to 1 until the new FID code is in effect.


Translation - write the new voltage identification and frequency identification (divider) bits to the appropriate register, set a timer and wait. The power supply changes the voltage based on the Vid bits and the CPU starts using the new divider once the PLL has settled down. The HT bus has to be disconnected during transitions, but there are NO LIMITATIONS listed anywhere on maximum time allowed in the lower power states.

So, once the BIOS sets the voltage to 1.2 volts and the frequency to 1.6 GHz, it will stay there. In fact, if I bought one of these chips today and had a motherboard that supported 1.2 volts Vcc, and set the multiplier to 8, it would run all day dissipating less than 34 watts -- and DRAWING less than 34 watts.

<<AMD could, in a nanosecond, remark the same chip to be a 1.6 GHz 34W TDP, 1.2 volt 64-bit part.>>

<I mentioned this possibility in my post. It looks like you didn't make it past the first sentence...>


No, you said, AMD would have to release the chip to do this. I'm saying the silicon is already released, all they have to do is remark it and add BIOS support for it. Its clear from the guide above, that the power states are implemented via software (BIOS or OS) controlling the voltage ID of the chip and the multiplier.

As for the rest of your post, I agree it was premature of me to declare victory in either the battery life or performance battle until there are some better chipsets and OEM sponsorship, but I really do believe that, 3 months from now, the situation will be vastly different. The BIOS guide clearly states that the P-state transitions did not work properly prior to Rev C chips, so any new laptops should perform better than that tomshardware review. Even lower power specs are promised for later this quarter, while Dothan is rumored to be a useless chip. Personally, I think AMD is sandbagging big time about the thin and light market.

Petz

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