Awk.
Having commented on the reliability of Wave numbers recently, perhaps you could sum up How Merom, Santa Rosa and quad chips have not only physical TPMs as part of their operating philosophy, but how this fact in 2oo7 will put both trusted computing and virtualization smack center into the operations of the computer world. On some level, folks seem to have forgotten that the slog has not been caused by Wave's slowness, but by the very complexity of the architecture which is now bringing a new level of trust from Intel to the computer itself.
I believe the above is one of the reasons you and I maintain a level of confidence in the future that seems so much harder for some of our friends to sustain.
The FACT is that the next generation of INTEL chips make no sense without a TPM 1.2 at the bottom of the stack. From there everything flows upward and Wave's interoperability in the middle of the stack become more important with every advance in chip design. As the popular journalists need to deal with the Santa Rosa chip and Merom, they will increasingly have to deal with TPMs and as the use of virtualization becomes commonplace the need for authentication and key management becomes critical. Unless our colleague really understand the function and timeline on these points, we and they are stuck in negative feedback loops discussing why it hasn't happened, when indeed our mistake was thinking it could happen before these pieces were in place or worse yet, thinking it will never happen because it hasn't happened yet.