Wednesday, December 20, 2017 11:40:51 AM
Tsai , et al. December 19, 2017
Methods and apparatuses for advanced receiver design
Abstract
Disclosed are embodiments of apparatuses and methods of use thereof for frequency domain (FD) chip level (CL) equalizers used in wireless receivers. The FD-CL-EQ may further selectively apply a higher order matrix inverse or a lower order matrix inverse in the calculation of a channel estimate based on whether interference is present or not. Further disclosed are embodiments of methods and apparatuses for estimating pilot signal-to-interference ratio (SIR) in the wireless receivers. Further disclosed are methods and apparatuses for compensating for phase errors in received demodulated data symbols to improve performance of the wireless receivers.
Inventors:
Tsai; Allan Y. (Boonton, NJ), Lawton; William E. (Pottstown, PA), Iyer; Lakshmi R. (King of Prussia, PA), Fazili; Muhammad U. (Audubon, PA), Raghavan; Manasa (Sunnyvale, CA)
Applicant:
Name
City
State
Country
Type
InterDigital Technology Corporation
Wilmington
DE
US
Assignee:
InterDigital Technology Corporation (Wilmington, DE)
Family ID:
1000003018074
Appl. No.:
15/630,444
Filed:
June 22, 2017
Prior Publication Data
Document Identifier
Publication Date
US 20170303147 A1 Oct 19, 2017
Related U.S. Patent Documents
Application Number
Filing Date
Patent Number
Issue Date
15169100 May 31, 2016 9693240
62168241 May 29, 2015
62168104 May 29, 2015
62168431 May 29, 2015
Current U.S. Class: 1/1
Current CPC Class: H04W 24/02 (20130101); H04B 17/336 (20150115); H04L 5/005 (20130101); H04L 7/02 (20130101); H04L 27/3494 (20130101); H04W 52/12 (20130101); H04W 56/0035 (20130101); H04L 27/265 (20130101); H04M 2207/206 (20130101)
Current International Class: H04L 7/02 (20060101); H04L 27/26 (20060101); H04W 56/00 (20090101); H04W 52/12 (20090101); H04W 24/02 (20090101); H04L 27/34 (20060101); H04L 5/00 (20060101); H04B 17/336 (20150101)
PPP
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