Advanced Micro Devices Inc (AMD)

[SemiconEng]

SemiconEng, Thanks for not escelating the fud, I over reacted.


---Same here, No need for escalation, but I was tempted......


Planerization, (as I understand it) would seem to be subject to the scale effect. I should have stopped there, but here's another angle. Area for 300mm is ~2.25 * 200mm wafer. Assume that there is an optimal size for the current tooling. What might that be? Just on the face of it 200:300 is a large step and in a conservative model presumes optimum is higher.


---Could be, I'm not a Planer Person, but I know surface uniformity is of the utmost concern for Planer people. My guess would be that for larger 300mm tools, the polish pad would also be larger, so it might be a wash, but I can't say either of those, for a fact. I've seen planer tools in operation, and the polishing looks mostly to me, like an orbital car waxer, the pad rotates, but the whole pad assembly also revolves, most likely for the same "Swirl Prevention" as the waxer. Constant Pad pressure is maintained across the wafer surface, so the pad doesn't need to cover the whole wafer at once, and I would "guess" that uniform pad pressure, age of the pad, and pad cleanliness, would be more of a factor than pad size. ALL WAG of course.


Double the size of the wafer, compound that with double device dencity. As YB pointed out large caches may soak up that very expensive realestate.


--- Sure, big cache takes up lots of space, but 300mm also has lots of extra space. Most Modern Cache has redundancy, so if defects spoil a transistor or 2, just fuse it, and use the recundancy. I believe intel does have this chache redundency, and they certainly need to soak up all the "underutilized Fab capacity" (Cough) that Dan keeps talking about, right?


I think it was noted in Bill and Ted's Excelent Adventure, "If such a thing as infinite smallness exists then infinite largeness also exist", can't have one without the other.


---True, for particles, it's good thing those Wet Clean guys can get rid of all that Largeness on the wafer surface. Now infinite small..... that's a pain for sure.

Semi