Advanced Micro Devices Inc (AMD)

[SemiconEng]

SemiconEng, My sarcasm was in response to yours.
As far as larger wafers, the larger size is obviously causing some cost. What parameter drives this added cost. What might be the trade offs.
I would suggest that in a perfect world Intel would get wafers that matched their specfications. My guess is that when Intel processes a wafer defects are not exclusively random. I can further speculate that the ratio of yeild to wafer size is not liniar.


Touché then on the sarcasm

The additional manufacturing costs for 300mm are almost all related to the purchase of the equipment, and related to the additional time to shoot wafers in litho, and possibly additional time in planerization/polish. I don't think that Film Deposition and Etch would be as affected by wafer size, since the entire wafer is dep'd or etched at the same time. If a manufacturer paid a little more for the 200mm equipment, they could have purchased a 300mm "capable" tool, lowering the need to purchase new equipment.

As far as defects go, Elmer is more of an expert than I am, but from what I've seen, defect density is actually lower on 300mm wafers than 200mm wafers, so the reported increased yields could be a by product of that lower DD.

Semi