Intel Corp (INTC)

[Ixse]

Conroe performance claim being busted: http://sharikou.blogspot.com/

Some conclusions on Aces:

Redpriest: "Conroe can only read 1 128-bit load per cycle."

Eric Bron: "ah yes, that's why I was thinking from your comment that some of your tests were read only, anyway the L1 write bw is fabulous when compared with the one in P4, welcome back the writeback L1 !

the balanced L1 R/W bw (+ mem disambiguation) should have a big impact on algorithm design, instead of avoiding stores we will be allowed to do more creative things."

Link for above quotes: http://www.aceshardware.com/forums/read_post.jsp?id=115160675&forumid=1

It's a bit weird to read that Conroe might only be able to do one 128b load per cycle as an Intel presentation claimed it could execute several 128b ops simultaneously.

Also Conroe performance might improve a lot in a limited amount of sub benches when Intel's compiler is modified for it.

Regards,

Rink