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Advanced Micro delays Hammer launch:
This is the only major frustration of not being able to post on SI. I'd love to remind those Droids how we told them this would happen over and over again.<G>
I believe AMD knew this was necessary all along, but how could they admit it 6 months ago? They have nothing to market but hype. They have to string potential customers along with an undefined release data that has now slipped by years, and performance claims that have no definition as well. Who in the world is stupid enough to believe these guys? Well let's see... Dan3, NiceGuy, Ali Chen, Milo and the whole gang. I predict once again, this is not the last slip.
Sure wish I could tweak a few noses but that's life...
EP
AMD delays Hammer for desktops
By Michael Kanellos
Staff Writer, CNET News.com
September 12, 2002, 2:32 PM PT
http://news.com.com/2100-1001-957757.html
[edit: the story kind of speaks for itself. AMD is as good as dead, imho]
Advanced Micro Devices has pushed out the release of its highly anticipated Hammer chip for desktops by almost a quarter, and will delay the release of another Athlon chip.
The desktop version of Hammer, which is code-named Clawhammer and will be marketed under the Athlon brand name, will now ship to PC manufacturers in the first quarter of 2003 and will hit store shelves toward the end of the first quarter or at the beginning of the second quarter, said John Crank, senior branding associate at AMD.
Earlier, AMD planned to ship Clawhammer to manufacturers by the end of the fourth quarter and have it on store shelves in the first quarter.
Opteron, a version of Hammer for servers, will still come out in the first half.
Similarly, the company will postpone the commercial release of "Barton" a new version of the Athlon chip with a performance-enhancing 512KB secondary cache, from the second half of this year to the first quarter of next year.
The delays are occurring to accommodate the release of a new version of Athlon with a 333MHz bus, said Crank. Current Athlons come with a 200MHz bus and 256KB of secondary cache. Typically, a faster bus, which is the main data conduit between the processor and memory, means better performance. An Athlon with the faster bus will come out this quarter, he added.
Although it encountered few missteps in manufacturing in 2000 and 2001, AMD has been bogged down a bit by delays this year. The Athlon XP 2400+, originally due in the second quarter, is slated to come out this month. The company also redesigned the Athlon this summer to reduce energy consumption.
AMD lost two points of market share in the past quarter and posted a loss for the fourth straight quarter.
Rival Intel, meanwhile, is continuing to push the gas pedal on the Pentium 4. A 3GHz version will debut this quarter, the company said this week.
AMD delays Hammer for desktops
Turn out the liiiiiights, the party's oooooover.
By Michael Kanellos
Staff Writer, CNET News.com
September 12, 2002, 2:32 PM PT
http://news.com.com/2100-1001-957757.html
Advanced Micro Devices has pushed out the release of its highly anticipated Hammer chip for desktops by almost a quarter, and will delay the release of another Athlon chip.
The desktop version of Hammer, which is code-named Clawhammer and will be marketed under the Athlon brand name, will now ship to PC manufacturers in the first quarter of 2003 and will hit store shelves toward the end of the first quarter or at the beginning of the second quarter, said John Crank, senior branding associate at AMD.
Earlier, AMD planned to ship Clawhammer to manufacturers by the end of the fourth quarter and have it on store shelves in the first quarter.
Opteron, a version of Hammer for servers, will still come out in the first half.
Similarly, the company will postpone the commercial release of "Barton" a new version of the Athlon chip with a performance-enhancing 512KB secondary cache, from the second half of this year to the first quarter of next year.
The delays are occurring to accommodate the release of a new version of Athlon with a 333MHz bus, said Crank. Current Athlons come with a 200MHz bus and 256KB of secondary cache. Typically, a faster bus, which is the main data conduit between the processor and memory, means better performance. An Athlon with the faster bus will come out this quarter, he added.
Although it encountered few missteps in manufacturing in 2000 and 2001, AMD has been bogged down a bit by delays this year. The Athlon XP 2400+, originally due in the second quarter, is slated to come out this month. The company also redesigned the Athlon this summer to reduce energy consumption.
AMD lost two points of market share in the past quarter and posted a loss for the fourth straight quarter.
Rival Intel, meanwhile, is continuing to push the gas pedal on the Pentium 4. A 3GHz version will debut this quarter, the company said this week.
wbmw
AMD is below $8. Traditionally, this has been a good time to buy. Anyone have any comments?
I might start writing puts at $7.5 or even $5.
As you no doubt know, there still aren't any Athlons above 2200+ on pricewatch while Intel has 4 pages of 2.8GHz p4s already. Another AMD vapor launch.
EP
serializer/deserializer
Looks like all ultra highspeed transmissions will be done with differential pairs. The serdes converts from serial to parallel or visaversa.
EP
wbmw
Any fab expertise out there to quantify the challenge??
Someone should invite Yousef over here.
SAN JOSE -- Intel Corp. here today disclosed more details about its 90-nm (0.09-micron) process, including plans to deploy silicon germanium (SiGe) in the mix.
Intel plans to deploy a SiGe process in a communication-based version of its 90-nm technology, said Pat Gelsinger, vice president and chief technology officer for the company, during a keynote address at the Intel Developer Forum (IDF) today.
“As part of our 90-nm platform, we will include silicon germanium,” Gelsinger said. The Intel CTO did not elaborate on its SiGe technology, however.
Last March, Intel originally announced its 90-nm process, which will be exclusively made in its 300-mm fabs. Intel's first 90-nm product will be a high-speed Pentium 4-based processor comprising 330 million transistors and code-named Prescott. Prescott is due out in the second half of 2003, according to Intel.
Intel spoke of its 90-nm process in March when the Santa Clara-based company announced fully functional, 90-nm SRAM chips with six-transistor memory cells. The 52-megabit SRAM test chips are being used as a prototyping vehicle for Intel's 90-nm process technology, dubbed P1262.
Then, last month, Intel claimed it will be the first chip maker to utilize strained silicon at the 90-nm node, thereby beating IBM Corp. and others to the punch.
Today, Intel said it has added SiGE to its 90-nm mix. And it also disclosed that it is using a 40-gigabit-per-second SerDes device and a wideband CDMA chip as the test vehicles for its 90-nm communications process.
Greg
Now here is where my knowledge is old and less than worthless. How many processor and chipset designs need to be revved (shrunk) to get them to the right proces for optimal return. That's the question I'd like to throw out to the board!
I haven't seen Intel shrink any chipsets. It would have been a good idea to shrink the old 440bx when Intel was having so many rambus problems and no 133MHz sdram solution, but it didn't happen.
As for processors, historically Intel has aimed for a die size goal for hvm which has stayed close to the same across process generations. A compromise between performance and yield. Specialty devices like Itanium and large cache Xeons are exceptions because of their lower volume and higher ASPs. Right now NorthWood is much smaller than the Willamette which launched the P4 generation and I believe that Prescott will be smaller still. The question now being faced is will the equation change as performance demands don't seem to be there now to justify higher ASPs. AMD's model is to reduce die size to reduce die costs and get more production out of fabs so as to reduce the capex of building new ones. It'll be interesting to watch how this plays out.
EP
wbmw
How much fab capacity at .18u does Intel have now? You mentioned fabs 11 and 18. How about 12 and 14?
Yes those guys too. I believe it is currently running at fabs 11,12,14 & 18.
I don't know how many it takes to produce 44 million chipset parts per quarter. If we are generous and assume 250 good die per wafer on average (south bridge chips will be smaller, and probably yield above this, while northbridge parts would be larger, and probably yield lower), then they would need 13,500 wspw to fit the bill. That's at least 2 fabs worth of .18u running at full capacity.
That's exactly why Intel needs to move all P4s, including Celerons, to .13u.
Hi John!
Nice to see you posting here.
EP
wbmw
Elmer, also keep in mind that Intel now has a 75% attach rate for their chipsets, and almost all of this is currently .18u Brookdale parts.
What is meant by "attach rate"?
With die sizes only slightly smaller than CPUs, more than 22 million chipset parts requires quite a lot of fab capacity.
Multiply that by 2 for the south bridge as well!
Add to that Granite Bay and Springdale next year, both of which support dual channel memory and (I'm guessing) larger die sizes, and I have a feeling that Intel will have .18u production cut out for them, even after transitioning Celeron back to .13u manufacturing.
Yes of course that will strain .18u capacity but I still don't understand the need to go outside. Again I must admit that Intel has a far better understanding of their needs and capacity than I do so if they persue it the it must be for a reason. Keep in mine that this has not been confirmed yet by Intel.
EP
wbmw
Elmer, that will depend on what manufacturing process a Calexico chip is on. If it's .25u, Intel may not have any to spare, since the majority of their fabs have transitioned to newer processes. TSMC still has plenty of capacity at smaller dimensions, though.[/i}
It's hard for me to believe Intel would be designing anything new on .25u but I've been fooled before. I was under the understanding that Intel was developing a new process specifically for comms.
However, while that would be the simplest explanation, it's more likely that new communications devices are new being produced at the .18u level. In this case, it's all speculation, but my hunch is that Intel is trying to wind down .18u operations, and move everything to .13u.
F11 will be running .18u for quite a while still and that fab has enormous capacity. F18 is 100% .18u and when Willamette rolls off there they will have lots of capacity open. Additionally Irelands fabs are .18u and add to the total too.
Having said all this, Intel obviously knows more about their fab loading than I do so if they see a need it must be for a reason.
EP
A curious news article. Does Intel expect to be short on fab capacity for chipsets?
Intel may consider outsourcing wireless chips for Banias platform from Taiwan
TAIPEI, Sep 11, 2002 (AFX-Europe via COMTEX) -- Intel Corp may consider outsourcing the Calexico wireless chips meant for the Banias platform on notebook PCs from Taiwan, the Economic Daily News reported, citing Intel vice president Dadi Perlmutter.
However, Intel will not grant licensing to chipset suppliers in Taiwan that may want to introduce products supporting the Banias processor, he said in remarks at an Intel Developer Forum in San Jose.
The newspaper said Taiwan Semiconductor Manufacturing Co Ltd (2330.TW) is likely to win the Intel order for Calexico chips.
Apparently there have been a number of revisions to the Hyper-Threading cores since we first looked at its performance with the Xeon months ago. These updates have apparently improved performance of Hyper-Threading to the point where we might see some performance gains in situations where we saw the opposite originally.
This was alluded to by Bill Siu when he said specifically that the recent stepping provided proformance improvements for HT.
It will be interesting to see benchmarks and they should show up soon with today's release of the new Xeons.
EP
But I didn't realize that had happened to you
I was terminated with the simple explanation that I had been posting under multiple other aliases. Untrue but they wouldn't discuss or explain their reasons for believing it to be so.
Go figure!
EP
I sure didn't know that. Who got the unexplained boot??
Have you seem me posting over there lately?
EP
SI is becoming "stale", and too many juvenile posters find their way on there these days.
Not to mention those who were terminated without explanation...
wbmw
Nice to see you posting here. Hope you come by often.
EP
New Intel® Xeon™ Processors Ship For Dual Processing Systems At 2.8 And 2.6 Gigahertz
Faster Bus Speeds, New Server and Workstation Chipsets Due Later This Year
INTEL DEVELOPER FORUM, SAN JOSE, Calif., Sept. 11, 2002 - Intel Corporation today unveiled the Intel® Xeon™ processor for two-way workstation and server platforms at 2.80 gigahertz (GHz) and 2.60 GHz. The new products, which are coming to market a quarter earlier than originally planned, feature 512 kilobyte (KB) of level two cache and built on Intel's industry-leading 0.13-micron process technology.
"Intel Xeon processor-based platforms continue to lead the industry in terms of performance and value, and we're seeing great momentum for our platforms worldwide," said Lisa Hambrick, director, Intel Enterprise Processor Marketing. "We're designing and manufacturing our enterprise products faster than anticipated and expect a number of OEMs and channel distributors to ship systems based on these products this week and throughout the year."
In workstation configurations, dual-processing systems are popular for applications such as digital content creation, mechanical and electrical design, financial analysis, and 3D modeling. Technical or High performance Computing solutions can also benefit from the improved performance. A number of manufacturers will begin shipping workstations based on the new processor speeds beginning this week.
Front-end or general-purpose Internet servers, featuring one or two processors, are used for Web hosting, data caching, search engines, security and streaming media applications. These cost-effective Intel-based servers address the infrastructure trend of "scaling out," where companies and service providers quickly deploy more servers to accommodate growth in server workloads and allow for redundant workloads for additional reliability and availability.
The Intel® 860 chipset for dual processing Xeon processor-based workstations is available for these systems. The chipset utilizes RDRAM and provides the graphics support high performance workstations need, with a dedicated AGP 4X port. The Intel E7500 chipset is also available for dual-processing servers.
The Intel Xeon processor with 512 KB level two Advanced Transfer Cache is priced at $562 in 1,000-unit quantities for 2.80 GHz and $433 in 1,000-unit quantities for 2.60 GHz.
Faster System Bus, New Chipsets Coming Later This Year
In his keynote at the Intel Developer Forum this week, Senior Vice President Mike Fister gave a preview of what's coming later this year for the enterprise, including chipsets codenamed Granite Bay and Placer for uni-processor and dual-processor workstations, respectively, and a server chipset (Plumas 533).
These chipsets will feature a 533 MHz system bus for even greater server and workstation performance with dual channel DDR 266 memory (Granite Bay and Placer also have AGP 8X support) and are due in the fourth quarter 2002 along with new Intel Xeon processors for servers and workstations.
About IDF
The Intel Developer Forum is the technology industry's premier event for hardware and software developers. Held worldwide throughout the year, IDF brings together key industry players to discuss cutting-edge technology and products for PCs, servers, communications equipment, and handheld clients. For more information on IDF and Intel technology, visit http://developer.intel.com.
Intel, the world's largest chip maker, is also a leading manufacturer of computer, networking and communications products. Additional information about Intel is available at www.intel.com/pressroom
Intel, Xeon, and NetBurst are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
* Other marks and brands may be claimed as the property of others.
press release
HP Posts World-record Benchmark Results for Secure, Encrypted Internet Transactions
Record Performance Extends Across PA-RISC and Itanium 2 Processor Servers
PALO ALTO, Calif., Sept. 9, 2002
--------------------------------------------------------------------------------
HP (NYSE:HPQ) topped its competition with world-record benchmarks by its midrange and entry-level servers running the industry-leading HP-UX 11i operating environment(1) on high-performance PA-RISC and Intel® Itanium® 2 processors. HP's 4-, 8- and 16-processor servers demonstrated superior performance and scalability on the SPECweb99_SSL benchmark, which is widely accepted as a meaningful measure of a server's ability to effectively handle secure, encrypted Internet transactions.
Supporting its 5-year market share leadership in the midrange UNIX® market,(2) the 16-processor HP Server rp8400 achieved a world-record result of 4,400 simultaneous connections for the SPECweb99_SSL benchmark.(3) This is 22 percent higher than IBM's result, which used the same number of its latest Power4 processors. Additionally, the HP Server rp7410 achieved the leading 8-processor SPECweb99_SSL result at 2,325 simultaneous connections -- more than 30 percent better than the nearest competitor's result.(3)
These new benchmark results reinforce HP's position as the provider of the most secure UNIX operating environment for directory and security services as rated by the D.H. Brown 2002 UNIX Function Review.(1)
HP also demonstrated the strong performance of its Itanium 2-based servers with the fastest result for a 4-processor system on the SPECweb99_SSL benchmark.(3) HP's newest Itanium 2-based server, the HP Server rx5670, achieved a result of 1,520 simultaneous connections, adding to a growing list of leading benchmarks for HP servers.
HP's consistently strong results span a broad range of workload types and benefit customers through improved real-world performance.
More information about HP servers is available at http://www.hp.com/go/unixservers".
Wanna_bmw usually attends the IDF.
Maybe you might invite him to post over here?
EP
Hi Greg.
Server makers Unisys and NEC are expected to provide the first public demonstrations of "Madison," Intel's third-generation Itanium processor, at Intel's Developer Forum on Monday.
Demonstrations of new processors under carefully controlled circumstances, while a far cry from actual sales, are an important milestone in bringing a new product to market. That importance is elevated for the Itanium line, an unproven and ambitious product family with complex features needed for top-of-the-line servers often using dozens of processors.
The demonstrations Monday, slated for Intel President Paul Otellini's opening keynote address at the Intel Developer Forum, will show off features designed to appeal to high-end customers, according to a source familiar with the plan.
NEC will show a Madison system with 32 processors running SAP's business software, while Unisys will demonstrate upgrading four Itanium 2 processors to Madison processors, a process that will take place without disturbing software running in a separate 12-processor section of the server, sources said.
Unisys said in an advisory it would demonstrate a Madison server but didn't comment further. NEC didn't respond to requests for comment.
The Itanium family is the central element of Intel's effort to crack the market for high-end servers, the computers that run demanding, round-the-clock jobs such as tracking a company's inventory and sales. While Intel processors are used in huge numbers of lower-end servers, IBM, Sun Microsystems and Hewlett-Packard dominate the high-end market with servers using their own processors.
Sales of Itanium 2 have thus far been lackluster. Market research firm Gartner projects that in 2007, Itanium server sales are projected to reach $4.4 billion, while Sun's UltraSparc-based servers will be at $6 billion and IBM's Power-based servers will be at $8.6 billion.
Both of Monday's demonstrations highlight one feature of the Madison chips: They are "pin-compatible" with their Itanium 2 predecessors, meaning that a computer can easily be upgraded with faster chips. It also means that Itanium server designers such as Unisys, HEC, Hitachi, Hewlett-Packard, SGI and IBM don't have to start their server designs from scratch when each new processor arrives.
Madison's successor, code-named Montecito, also will be pin-compatible with Itanium 2.
Madison largely is the same design as the Itanium 2 but features more high-speed "cache" memory and faster clock speeds. Montecito will be a more dramatic overhaul of the chip circuitry.
Intel announced in June that it had passed another Madison milestone, running several operating systems on prototypes of the chip.
While Itanium systems are still scarce among customers, they're starting to gain respect.
"Given the long gestation and tepid performance of its first generation, we have been resolutely skeptical that the Itanium processor family would achieve its breakout objectives. Itanium 2, however, cracks that skepticism with its stunningly good performance results," Illuminata analyst Jonathan Eunice said in a recent report.
Meanwhile, SGI also plans to trumpet its Itanium systems Monday at the show, detailing the performance of a server with 64 Itanium 2 processors running the Linux operating system. The company plans to begin selling the product early in 2003.
Testing to see if this account is still active.
EP
Cool. A 400mhz bus spped is a big improvement. The 200mhz bus was the main reason AMD machines were faster than INTC machines a while back. I haven't really been keeping up with it lately though. Thanks for the info!
The P4 has always had this bus speed for data transfers.
EP
Yo Greg. Thought I'd check out this website.
Hope there isn;t too much spam.
EP