Intel Corp (INTC)

[Elmer Phud]

Greg

Now here is where my knowledge is old and less than worthless. How many processor and chipset designs need to be revved (shrunk) to get them to the right proces for optimal return. That's the question I'd like to throw out to the board!

I haven't seen Intel shrink any chipsets. It would have been a good idea to shrink the old 440bx when Intel was having so many rambus problems and no 133MHz sdram solution, but it didn't happen.

As for processors, historically Intel has aimed for a die size goal for hvm which has stayed close to the same across process generations. A compromise between performance and yield. Specialty devices like Itanium and large cache Xeons are exceptions because of their lower volume and higher ASPs. Right now NorthWood is much smaller than the Willamette which launched the P4 generation and I believe that Prescott will be smaller still. The question now being faced is will the equation change as performance demands don't seem to be there now to justify higher ASPs. AMD's model is to reduce die size to reduce die costs and get more production out of fabs so as to reduce the capex of building new ones. It'll be interesting to watch how this plays out.

EP