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Apologies for triggering confusion. I just think of development and product as two pairs of shoes: While development is a continuum, steppings (and revisions likewise) for products are freezed development points on this continuum. What i actually believe to understand better is Daryls charts failed to pick folks up where they are - i.e. assuming every development point is a product as well. Looking at it from this stance the confusion is understandable - just from understanding the errors on both sides of this communication.
K.
Thanks. I understand better now where the understanding appearing peculiar to me originates.
K.
that's gotta make someones' turbine unwind??
Just yours, i guess. Abu Dhabi is not known to play casino-style games. I don't know their game-plan in this case, but i've seen them always playing smarter than it's obvious at first glance. If they did not expect or even intend this, one telephone call would have been enough to avoid it.
K.
Process development is a continuum, where you always go step by step, change by change. This is not specific for AMD, but generally so. However AMD neither did qualify, let alone manufacture volume with a "65nm process using 90nm transistors", nor will it do this for 45nm-product - if only because it would not give them enough economies to justify this.
K.
but then so will be the transition to immersion litho.
It's a challenge to lead the way here, yes.
K.
So most likely AMD will stick to 65nm transistors, and shrink the other features only
This is a peculiar idea.
K.
moving from 65->45 is much harder than from 90 to 65.
In AMDs case, not quite. Their move from 90 to 65 was particularly hard for the transition to a completely new 300mm toolset, while their move from 65 to 45 will be eased by nearly identical toolsets - except for the litho-part, naturally.
Also, AMD could only exploit many of the benefits of SoI a node after they initially used this technology. Something similar would well happen in their second node of 300mm-manufacturing.
K.
Geode is fabbed at UMC. Nothing to do with Dresden.
K.
This is exactly the kind of comment I get within my organization as a result of my "intel-inside" kind of evangelism.
What does your organization buy?
K.
Variability is way higher. Put very simplified, your analysis covers the upper half of the power distribution. The lower half are Turions.
K.
what is an mb?
Janis Joplin wanted one. ;) I leave it to Duke to provide the text.
K.
You actually think AMD will make 30% MS by the end of 08?
I don't think so. Record mss might be doable until then though, i.e. north of a quarter.
Actually, i rather expect Silverthorne product will be counted in mss from 09. If so, a leading 3 probably won't show up for AMDs mss within this decade.
K.
Do they have the cash to convert the other fab to 300mm?
Not completely yet. They might be fine for a good portion of next year's planned Capex after the equity-injection which might allow initial production. The rest is to be seen.
Seems like they need to sell another 4+ million chips per quarter to get there
As i said earlier, anything below 100Mu annually is not enough as i model it - they need 8Mu more per quarter to get there. I see no way this can be done in two quarters - this takes longer. Hector's target for 30% mss by end of 08 is not out of imagination but looks fairly ambitious.
K.
it is debatable if additional market share is worth pursuing since it will come at the considerable cost of equipping and ramping the second 300mm fab.
If AMD cannot tool a second fab it will need to manufacture, develop and migrate in Fab36 - and certainly lose marketshare. One fab is only good for 20% mss if it can be fully utilized for volume manufacturing going forward.
K.
Intel supply 77% of the market with 2 FABs
Gee mas, i am afraid you have aquired the virus of this board which destroys ablilities of finger-math.
K.
I've seen a device demonstration - however i already said Silverthorne can be understood as a physical die and as a feature-set. I have also seen a package with a small die, but not the die in the device demonstrated. If you did, i'd appreciate a pointer.
Call it paranoid if you want. If so, it's just following Andy Grove's advise how to look at things.
Having said this, i don't claim the small dies won't ever go into production, there could be even working devices already. I just have neither seen this nor is it relevant for my understanding of Penryn's DFM.
K.
Elmer
Could not get more specific on this before AMD says something. They did now:
http://www.theinquirer.net/gb/inquirer/news/2007/11/18/amd-delays-phenom-ghz-due-tlb
K.
It also clearly shows the Penryn core is nothing like the Silverthorne one.
It is pretty clear optimizing for a single-core die results in a different layout than optimizing for a dual-core-die with shared cache. E.g there are functional units you don't need for the former, so the same layout would leave unused space. Beyond, there is circuitry in Penryn for future deployment which you don't need in Silverthorne because it is not intended for deployment in its future revisions. Beyond, Silverthorne might have products for its lower-feature-yields in mind which suggest layout-changes to allow these to be fused out reasonably. And many more things to consider. However reaarranging functional blocks and µarch-changes are different pairs of shoes.
K.
I really can't comment without further information which features these products have. It could be a subset of Silverthorne-features, something similar to the relation of Penryn and Silverthorne for the Silverthorne-die.
K.
Could you point me to a package smaller than 107 sqmm?
K.
how do you get to 10 to 200 mw using your hypothesis?
Afaik Intel never used these figures for Silverthorne. I heard them saying it ranges from 600mw to 2 Watt.
To get from the sub 2Watt down to 600mW you might just have to reduce frequencies below 1,2GHz - to say 800Mhz or so. Whatever it takes to get there.
K.
The slide Wouter provided gives an impression of proportions between core and cache circuitry of both dies.
http://pc.watch.impress.co.jp/docs/2007/0425/kaigai355_04.jpg
Beyond, the former posting was certainly simplified, meant only to show your claim you cannot get to Silverthorne power-level with a Silverthorne-product from Penryn dies lacks any substance.
K.
Power varies directly with die size?
Not at all. Power is correlated to circuits, which are correlated to transistors. Only transistors used draw power. So a 100+ sqmm die does not draw more than a 25sqmm die if you you only use a quarter of the former die's transistors and all of the latter.
K.
We have cable - just because it was there already when we moved in and had to take the contract. Reminds me is should ask the wife to find out how we come out of it. I can't remember when our TV-Set was on last time. Certainly a year ago - used to watch a video.
K.
you can't get extreme low power Silverthornes from Penryns no matter how much you chop or shut parts off
Sure you can. Back on an envelope math is sufficient to understand why:
A DC-SKU from Penryn fits into a power envelope of 30Watts to allow a mobile part. This is a 100+ sqmm die.
Features of Silverthorne use about 25sqmm of transistors, thereby using a fourth of power, this gets you to 7,5 Watts or so at this frequency. Reducing the frequency to half of the above reduces powerdraw by the square of the denominator, which gets you below 2 Watts. There you are. Embarrassingly simple, isn't it?
K.
Now I can't exclude the possibility that ULV Penryns and Silverthornes will be sold under a similar brand name, but thats strictly a marketing issue and has nothing to do with the technical theory you were trying to 'prove'.
Oh i see: Our understandings of the codename "Silverthorne" are fundamentally different: You (and probably others as well) understand it as physical dies, whereas i understand it as a feature-set.
Needless to say, understood as physical dies there is no dispute Penryn and Silverthorne are different.
Adopting your understanding, what i am getting at comes down to this: My understanding of the DFM of Penryn-dies includes the feature set of Silverthorne-dies. There is no way to prove this currently, as products are not out yet, so it might stand in question until then.
K.
I don't know what your husband does there - so i can't know in how far he overlooks Intels DFMs. You might be well aware folks working in this industry only get as much context as they need to know to to their jobs.
K.
This is not a question of eyesight. I believe just storing input from presentation-slides coming in via optical nerves does not allow an understanding of how things are - this input needs processing to put it into a context:
I see two different dies, the left one of an integrated DFM that allows to use its distribution to make Xeons, C2Ds (both with different feature-sets) from, and Silverthornes as well to maximize useable silicon coming out of its manufacturing. The right one only has the features for Silverthorne.
K.
It is very hard for me to predict what people will adopt in this respect without marketing-research-data - i seem to be everything but representative: When short-messaging between handsets became popular i thought such a poor way of communicating would not last long (which was why i refused to use it from the beginning). It was obviously utterly wrong - i see people still doing this.
I never got to play with ipod-touch, but with iphone. I find it easier to use than handsets with mechanical keyboards - actually the design impressed me enough to look after who is behind it. Apple uses a team around Hartmut Esslinger (frog-design).
K.
I hope the story below will help your "emotional brain".
The closing remark of the story certainly does.
K.
Elmer
I've already said showing such a wafer is perfectly in order:
http://investorshub.advfn.com/boards/read_msg.asp?message_id=24636148
Saying you can make 2500 Silverthornes out of it is as well, naturally.
K.
Yup. Bonnell-core is the name summarizing the feature-set of Silverthorne. You might have noticed Justin was clear in saying IA and Silverthorne are a common architecture. Perfectly in order.
K.
Sure. The whole (Penryn) design (which Silversthorne is an integral part of targeted at ULV) is designed from the ground up - so the statement is perfectly in order.
Although it is not said Silverthorne is a design independent from Penryn, the pictures (strongly) insinuate this. These pictures are in order as well: Intel can make Silverthorne from wafers as pictured.
K.
See reply to Kate.
I do not follow the thread continously, so i might have missed a pointer to a source claiming Silverthorne would be a an arch different from Penryn. While i have seen it claimed on boards dozens of times, I neither heard Intel saying so nor any other source familiar with Intels plans.
K.
Intel does not say so. Look here, e.g.:
Intel previously announced that Silverthorne will debut as part of the “Menlow” platform in 2008. The processor will replace the recently and quietly introduced A100 and A110 UMPC CPUs, which are basically under-clocked (600 and 800 MHz, respectively) versions of the 90 nm Pentium M processor with Dothan core.
From the link smooth provided today.
http://www.tgdaily.com/content/view/32404/118/
K.
You think that's a down binned Penryn?
No. I think of it as presentation material. Good idea, btw. Showing a wafer is far more credible than a slide with a picture.
K.
In the past Klaus made other comments indicating process variation was a serious problem in testing parts due to the many speed paths and difficulties covering them all.
That's not what i meant to say. It's not problem AMD has, let alone in testing. It's just a phenomenon of device physics.
K.
Elmer
Never heard Intel saying so. Did you?
K.
One day I might spend the time to look at a die and do this further math
This might help to get a tad closer - but i am afraid not much. To see redundancies you need to look as close as chipworks or semiconductor insight.
K.
No one ever said these were low performance parts
PO was pretty specific about the performance of Silverthorne at IDF spring this year.
I would think in the sense that they intend to redefine the market as it is...
I'd think that makes a pretty good PR-statement. It sounds impressive, is not wrong and does not say anything at all.
K.