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elmer - lol eom
elmer re Thorton
The japanese pc-watch guys brought this codename up some time ago. I dont think it is what Anton means it is but rather a THORoughbred Core with dense cache of BarTONs size resulting in a die-size similar to Thoroghbred again.
If so, and AMDs design shrinks are a year behind Intels as in the past, it is something we will not see on the market before next year.
K.
chipguy - touché
As for the past, right on the spot.
As for the future, I dont know which Intel product you can buy from HP for the price of a nForce2/XP3000+ system. I dont know how many of what will be sold. What I know is corporate budgets are somewhat constrained nowadays. So are public households.
So HP people maybe are busy enough preparing offers requested from existing clients to find time to call couple of former customers. Dont worry, they will call in - if only to request a competitive AMD-offer to slash Dell-pricing.
K.
Dan re: I was refering to PC2100
Which is supposed to be operated at 133MHz, right?
As the amount of RAM of system is 32 GB, that would probably require 2GB-Modules on 16 Slots, I guess the reason is that at April 3, when the specs were submitted PC2700-2GB modules (ECC) have not yet been available. K.
HP press release
http://clearstation.etrade.com/cgi-bin/bbs?post_id=4457308&Refer=http:/www.clearstation.com/redg....
Apart from the fact I did not find it yet on HP site it reads pretty lame...
Understand, yes, we sell this cheap stuff as well because some poor people ask for it, and yes, if they want they can even have a Model 3000+ processor with it (which clocks much lower by the way), but we are not really committed to that stuff.
Anyway, HP's customers at least have a choice now. Which is a good thing. Dell's customers dont have that. Which they might accept until the end of their days - not.
I sure hope HP will ask a couple of Dell's big customers if they will or not.
K.
sgolds re: Excellent article
However, IBM to become a foundry or not, I am not sure that decision is already made.
K.
dan thanks
One order of magnitude for yesterday's memory systems. Probably less compared to Opteron memory system.
That is about consistent whith what my gut feels about it. (which is unfortunately about all i can add to the technicals)
However, I am afraid AMD will have to follow the cache-inflation to prevent another recipe to be added to the benchmarking cookbook, which is to use data sets between AMDs and Intels Cache sizes to be processed multiple times, either repetitive or in multiple ways. Prescott is known to have 1Mb already, so I dont think AMD will release any Athlon64 below that number (which makes sense in manufacturing economies of scale anyway).
As for the benefits of doubling cache L2-cache from 256 to 512 Kb, we know what AMD thinks about it benefitwise from Model 2800+ which they rate for a Tbred and a Barton Core: That is some seven percent measured in raw clockspeed. Although we dont know the metrics in terms of decreasing additional benefits, maybe doubling cache again for K8 maybe results in the same performance increase again. For the next performance gain of another 7 percent you would need to double again. That could be the dimensions of the metrics (says my gut).
K.
Dan3 re: RAM
Hmm, if you allow a maybe humble question in this context (at the level of metrics in another relation):
Comparing SRAM (cache) and DRAM, how much faster is the access to the first in orders of magnitude, do you know? And, is there any significant difference (in orders of magnitude) of access-times for L1, L2 and L3?
As for Cache-Sizes of Desktop-CPUs, I am very confident Babco an Cie will be able to identify enough cache-hungry applications for future Benchmarking suites....
K.
Appro 4100H PC2100??
http://www.spec.org/osg/web99ssl/results/res2003q2/web99ssl-20030421-00062.html
A typo or is there any reason it is run with 133MHz DRAM-Modules for Spec-Results?
From a post of knykny here: http://www.wallstreet-online.de/ws/community/board/threadpages.php?fid=0&tid=629588&page=-1&...
K.
deleted eom
Dan3 re: Perhaps they've hit a speed wall with their micro-cell cache
If the rumours are accurate that Xeon MPs (2MB on-die level 3 Cache) will make a leap from 2Ghz to 2.8GHz that would indicate that denser Cache allows CPUs scaling better clockwise instead of creating a speedwall. But that is for L3 cache.
Maybe it is different for L2 Cache: The rather poor scaling of Prescott within the next year according to Intels roadmaps would support your assumption.
Whatever it is, it seems to be too complex for one easy explanation.
And yes, Banias Cache (with most impressive density) could be a totally different story.
Whatever it is, what we can expect (or hope) is that AMD will be able to shrink its cache-cells similar to what we see now from Intel - with the usual time-lag of a year that is.
As far as K7 is concerned, there is no hurry for Thorton (which I believe is what we are talking about thisrespectively) as neither capacity constraints are in sight for manufacturing Barton dies nor it would not have enough legs for a while.
K8 would require smaller structures to move from a server/workstation-product to a desktop-chip imo. Which OTOH is extremely restricted in volume before Windows-AMD64 is available, so no big pressure of time here as well.
So, nothing really to worry about inflating cache-sizes from Santa Clara. Dont know where we are already on the curves of decrasing marginal utility from increasing L3-Cache in Serverspace and L2-Cache in Personal Computing, for none of the architectures. Do you have any idea about that?
K.
Dan3 re: may be that Intel is having trouble producing that super compact cache cell design
Sounds very convincing. That would explain a lot. Any rumours of a 512KB-L2 Pentium-M - Model? Would be close to evicence for your argument. K.
keith re: Watch out for some interesting news next week
Next Thursday will be definitely a very interesting day: Two analyst conferences at the date Intels midquarter-update is to be released.
From what I see on the markets I dont know how Intel could manage to stay within the current guidance. Even in an extremely backend-loaded quarter I would guess it is clear already that 6,4 B will not be the lower end of the updated guidance, but more probably the upper end...
Recent Intel stock movements suggest the contrary - unless clients portfolios have been loaded with Intel to allow getting rid of the stock on own books of institutions.
AMD has two presentations at that date (plus the possibility of an update from Hector, who is involved in neither of the conferences) plus a couple of days left for announcements to prevent the AMD Common to be destroyed on Friday.
No idea what the market will make out of what is to come, however:
Please fold up your tray table and pull your seatbelts tight, we expect some turbulences.
For those with airsickness-problems or weak hearts: Take your pills now.
For scared natures: Bail out!
For the rest: Enjoy the ride. Rodeo!
Nice weekend for everybody.
Klaus
keith re: HP to launch Athlon-packed business PCs
Good. Now, although HP is positioning systems as for SMB,
what we see from AMDs pricing is that AMD is (finally) in a position where they can deliver 3000+-models in volumes.
The very best use of that would be to move HP into a position to acquire one big Corporate account from Dell with an AMD-offer. One Dollar per CPU would be a reasonable price for that.
K.
Nomen est Omen?
The second half of next year will also see the release of the Potomac processor, a successor to the Xeon MP family, using the Twin Castle chipset[/I]
http://www.theinquirer.net/?article=9765[/URL]
If so, i would not be surprized at all.
K.
lol, greg :)
was good news, exactly two years ago...
paul re: MSI confirmed....
In fact they confirmed that it is done. Nothing else. They just quoted what Frank Völkel wrote about the "ingenious logic".
Being "in the process of internal testing and applying for a patent" to be the reason for being silent... but shipping it already. ROFL, how dumb exactly MSI believes Frank is? (Maybe they are right, he did not make any comment on that yet).
See #5219 for more.
Klaus
paul
Is that what you believe? Or do you have knowledge of what MSI would have added?
Klaus
"Dynamic O/C of MSI-Boards"
Some humble second thoughts...
Sent an email to Frank Völkel to ask if he can positively confirm boards from other vendors do not show this phenomenon.
Then thought about if it would be possible to do this by means of PLL.
What MSI claims to be dynamic is not really dynamic. According to THG monitoring the FSB is raised in one step.
So if PLL provides this step... possible so far.
Therefore CPU-load must be monitored, when reaching 90% or so
a circuit could automatically switch the PLL from 200 to 215 FSB. Possible. Chipset only must allow to monitor processor load.
Tried to identify the PLL, but from pictures or specs I was not able to find out.
OTOH, if it is done by PLL one would expect it to be recognized by the usual tools, or not?
Frank states: With conventional tools, such as the popular WCPUID, Intel CPU Frequency Display, CPUZ and SiSoft Sandra 2003, the clock increase cannot be detected. Only a special tool was able to reveal the raised clock speed.
The "special tool" showing the increase is titled Intel P4 CPU Frequency utility.
Sort of strange, all that. Maybe sb else can dig deeper, as I feel to be already beyond my capabilities to make reasonable judgements here.
Trying a less suspicious approach for the matter:
AMD plans to integrate PowerNow! or something similar to Athlon64 (which is sure a very good thing).
So it would not be a very big surprise if Intel also is in preparation for something like that; Which is already present in Springdale and Canterwood Chipsets, but not used yet. But whose capabilities could be easily abused for cheating benchmarks meanwhile.
K.
Petz re: AMD is starting to deliver 2GHz Chips to Cray.
The Cray system is due for delivery to Sandia August, 2004.
I cannot imagine the platform to be already finished now, so delivery of Chips has (plenty of) time, dont you think?
K.
elmer - see 5189
I would appreciate it to happen again in the future :)
Klaus
(edit) elmer :)
Exactly. I could not be further away from being a circuit designer, but I cannot imagine a board to do things like that if the chipset does not support it.
Now, within just some minutes our thoughts are perfectly in line again.
Somewhat strange things happen today
Klaus
Elmer re: So I guess nobody needs new lithography equipment then
Exactly. We share the very same opinion - as far as I remember for the first time ever. ;)
To be precise, not 157nm scanners for now.
(Better mirrors, lenses for the projection and more sophisticated tools for corrections of optical projection errors can help to increase yields and binsplits by means of improving the quality of the projection on the outer areas, especially for 300mm wafers for the current process node already.)
K.
I would not have thought yesterday...
that I ever would post a link to Tomshardware. But here it is:
http://www17.tomshardware.com/cpu/20030522/fsb_overclocking-01.html
Now, this raises an obvious follow-up question:
Is this benchmark-tuning something invented (and used) by MSI alone or is it - carefully said - a chipset "feature"?
(MSI taking full responsibility for that in such a hurry is kind of unusual, dont you think?)
Now, if THG would follow this matter and publish what they find out would probably completely change my mind of this site.
K.
paul re: with all the backroom stuff
Yeah. Cray can still stumble in delivering what they promise.
We will only know next year when Red Storm is due for delivery. However, i do not consider Cray as a baby in the business, so I do expect adult steps from these guys, just to stay in your picture... :)
K.
Elmer
If you are talking about gate length d'accord. That's what I said.
The bottleneck is certainly not in lithografy btw. K.
wmbw???
"Kpf, processors only use advanced manufacturing techniques for the critical layers, that is, the layers closest to the polysilicon. Outer metal layers tend to have larger dimensions, and advanced lithography is not required. I'm sure someone like Elmer or Semiconeng can explain further."
Are you sure that is to my post you referred it to?
K.
paul re: an announcement isn't the same as a signature on the dotted line, though
Hmm, Paul, usually its elmer splitting hair. But well, yes, inking a signature is maybe different from finalizing a contract. Gift..
here is what Cray said October,21 2002.
SANDIA NATIONAL LABORATORIES AND CRAY INC. FINALIZE $90 MILLION CONTRACT FOR NEW SUPERCOMPUTER
ALBUQUERQUE, NM and SEATTLE, WA - The Department of Energy's Sandia National Laboratories and Cray Inc. (Nasdaq NM: CRAY) today announced that they have finalized a multiyear contract, valued at approximately $90 million, under which Cray will collaborate with Sandia to develop and deliver a new massively parallel processing (MPP) supercomputer called Red Storm. In June 2002, Sandia reported that Cray had been selected for the award, subject to successful contract negotiations.
Cray will deliver a system with theoretical peak performance of 40 trillion calculations per second (teraOPS) using two calculations/clock cycle, or 20 teraOPS using one calculation/clock cycle. Red Storm is expected to become operational in fiscal year 2004, and will use the upcoming Advanced Micro Devices Inc. (NYSE: AMD) Opteron™ processors connected via a low-latency, high-bandwidth, three-dimensional mesh interconnect network based on HyperTransport™ technology. This system is expected to be at least seven times more powerful than Sandia's current ASCI Red supercomputer on actual weapons problems. ASCI Red was the first supercomputer delivered under the ASCI program.
http://www.cray.com/news/0210/sandia_redstorm.html
As for "That's when things get a little more real"
May I assume your next post will be like: Wait, it is not an order yet? And if it is indeed an order, it still could be cancelled? We dont know the terms of the trade...
To prevent from that: Gift as well, all of it. :)
Klaus
paul re: Cray Opteron deal almost reality
Reality since months. Official confirmations from Sandia Labs, SGI and AMD. K.
yb re: Do you mean Prescott has 130 nm logic and 90 nm cache?
Affirmative on hybrid process. Maybe 120nm logic and 80nm Cache is closer.
Look at Banias: Obviously Cache is manufacturable in finer structures than logic.
Look at Prescott-Roadmap (for very little planned increases of clock-cycles)
Look at recently published stuff about adverse effects occurring for gate-lengths below 60nm and spacing-structures below that.
I am confident somebody can stick in with more insights to the matter than I have. K
Can't quite believe that Intel are slowing down on the 65nm project now
It(nel) would certainly not do that deliberately. But as they are far from having anything near 90nm this year for their logic-process (yes they have, for Cache), it is not very probable they need 157nm Scanner-Technology for the forseeable future. So why should they buy it? They just had to make a statement about it because ASML can deliver it now and they had orders placed for it. They did now with some nice argument that they have other opportunities to reuse their existing equipment. K.
Petz, good to see you here eom
combjelly re: But if they expect to have software support for that anytime soon, they can't keep it secret...
There is no need for any software support at all if they want to use some capabilities only for a demonstration.
As for what Hans is speculating about, I am far from a position to make any reasonable judgement.
But even without any clue about his arguments, the first question i asked myself looking at his stuff: Where is the picture of the die from his theories are based on?
K.
chipguy re: Prescott and 64-bit
I definitely agree that Prescott is not Yamhill or Ant Hill or any hill of that kind. Which is by the way Hans' conclusion as well, I understand.
However, it would not be exactly the first time that Intels designs contain some pieces that are not intended for immediate use (e.g. the HT-thingie). So having some 64-bit-capabilities of some kind would not be big news - if so and only intended for the purpose of some demo would not be any surprise (for me).
K.
sgolds re: No Intel FUD against Opteron
Would look pretty humble if they ride a direct attack, aint it?
These guys are smart enought to know that, you bet. K.
sgolds re: ...expect Intel's FUD campaign to be don't invest (develope, buy) AMD64
Exactly.
Could be like this?
What Hans de Vries discovered looking at Prescott's die should be enough to run some 64-bit demo with this Chip at launch. (but nothing more at all). Doing that, maybe this message will be delivered at the Prescott-launchtime:
Although Prescott is 64-bit capable we continue to be believe 64-bit computing for desktop-PCs adresses a problem that does not exist yet and for a while to come, but rising problems still to be solved within the next couple of years. Therefore we deliver proven and reliable 32-bit-technology with our new product with leading-edge performance, enhancing..etc.
K.
Dan3 90 nm, SoI Links
http://www.siliconinvestor.com/stocktalk/msg.gsp?msgid=18953218
From the SoI thing there is one alarming statement: Nazmul Islam claims IBM adopted SIMOX for manufacturability of SoI.
Hmm...Yes, IBM using SIMOX is known.
Now, that rises couple of questions:
1. AMD using SOITEC-Wafers, iirc that is not SIMOX, right? I mean I am aware it is two different companies from two different continents, but I have no clue what the difference of wafers these people deliver is exactly. Maybe someone can enlight me here.
2. What Nazmul Islam claims was true 1999, no doubt, is it still true for 2003?
3. AMD paid 42 Mio USD to IBM half a year ago, was it for the libraries only? Or was it for advising AMD what they have to change to make K8 manufacturable? SIMOX?
Any thoughts, guys?
K.
p.s: However, good to see K7 has legs obviously.
p.p.s: The other link on leakage for 90 nm firms my assumtion that Prescott is a hybrid-process.
Northwood --->Prescott seems to be very similar to P3--->Banias.
Nice to see you here, Bruce. eom
wbmw re: I think I'll trust the independent websites.
Good to see there is still some innocence in this world.
K.
Keith, thanks for posting the link
Where did you find it? I did not find it searching AMDs web site.
Hope that ends some endless discussion here - but more probably it will inflame this discussion again. If so, I would suggest to create an own thread for it. K.