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Rolling AMD calendar
Upcoming events of interest to AMD investors:
Within the next 24 hours: (i'm not sure about when exactly, suppose it is upcoming Midnight Sunnyvale Time)
End of six months period of Options exchange program.
(I still am convinced this has way more impact as considered here.)
Monday Feb 2: Prescott introduction
Thursday Feb 5, 2004: AMD boardmeeting
Tuesday Feb 10: rumoured date for Sun Opteron introduction
Feb 17-19, San Francisco: Intel Developer Forum. Expect AMD to have a suite nearby: http://www.theinquirer.net/?article=13840
May 4-7, Seattle: Microsoft WinHEC (Windows Hardware Engineering Conference), sponsored by AMD. http://www.microsoft.com/whdc/winhec/default.mspx
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To modify the calendar, simply drop off events that have occurred, add new ones and repost. Some long links may be destroyed by the cut-and-paste process, if a link doesn't work, go back to previous messages for the first occurrence of the link.
wbmw
Just for now.
Prescott needs LGA 775 to scale, thats for performance.
Then, dont forget it will be some 30% cheaper to produce than Northwood. Thats for success.
What remains, it will always be a lil bit hot. But I dont think the market will care much about it for now, as long as it is working ok. I mean the market looks at PCs as black boxes anyway.
Although netburst is a dead end road. But that will become obvious to the market only some way down the road. Still a lot of time left before it actually hits dead end. 2006 I would guess.
Nehalem is the cruical point in my book. Because this will be about the time AMD ramps up capacities which could become a real threat to Intel. Before, there is nothing much to loose in market share terms for Intel just for the manufacturing side of the equation.
K.
blauboad
Thanks. Volumes for Server only is definitely not a problem.
And never was.
But it would make far more sense to go for Opteron and A64 more or less at the same time for Dell.
K.
keith
Thansks for your thoughts. I already offered my take on flash from an other point of view here:
http://www.investorshub.com/boards/read_msg.asp?message_id=2184123
Bottomline, the strategic plan FASL is currently on can be considered as aggressive (driving out floating gate manufacturers of the NOR-market) or defensive (preventing the NOR-market to be eaten up by NAND) as you will.
[Btw, in such a situation it is not "comme if faut" to show big black ink and brag a lot, maybe you remember the comments about "competitors struggling"].
In essence, I am not worried at all about FASL for the current year, more marketshare gains to come and improving margins are imminent.
However, I do share your concerns medium term: NOR is always in danger to be a target of attacks from NAND which is about to be taken over by Dramurai.
Although I believe Mirrorbit can hold itself against NAND in terms of production costs, if NAND capacity will be growing faster than demand at some point there will pricing pressure - all the way down to variable costs, we have seen this already in DRAM-pricing a while ago. While this would not destroy NOR-segment, it could damage profitability.
WRT Capex, well yes, 200mm wafer processing Capex in 2004 in a high-labour country for manufacturing Flash is definitely something that should be seriously questioned. I think it only makes really sense if put in the context that one fab needs to be closed there and you have the options to take charges for it or employ the people in JV3-expansion. Also it should be taken into account there could be a lot of things behind the scenes we will never learn about, Japanese subsidies are given more quietly than German ones.
Longer term, all will hinge on what the next technology for Flash will be and who is first having it manufacturable.
If that is longer out than 2007, there is possibly a window of opportunity for 4bit-cells somewhere in 2005 or 2006, if that would be manufacturable. (It better is, as NAND will be at least partially on 2-bit-Saifun-Technology as well).
One more thing, coming back to the present: All figures of Q4-results should be taken with more than a grain of salt for the reasons you are aware of in the background.
K.
keith
Which statements of figures (or what else) made what clear to you? K.
blauboad
the Groo rumors say that the deal broke because of AMD's inability to guarantee sufficient supply...[/]
Desktop or Server-Deal?
K.
semi
Thanks. Let me take a second to sort this out. (I will post again as soon as I have it right)
K.
wbmw
http://www.xbitlabs.com/news/cpu/display/20040121103651.html
says Q2/05
Then you have to take the semiconductor-roadmap-decoder between my eyes and my brain into account. (Default is on). To recognize the text saying Q2 i had to switch it temporarily off.
K.
sgolds
Well, rumour has it Tejas slips to H2/05.
You know, it ends up in a philosophical question:
How long exactly is a nanosecond?
K.
p.s. Although I dont know this answer, there is one thing I can tell: You can loose a whole lot of customers in a nanosecond.
upndown
Thursday Feb 5, 2004: AMD boardmeeting
K.
joe
AMD is doing good to pick customers up where they presently are, don't you think?
Apart from that, you are certainly right, the market will be going the direction you propose. Over time, though.
K.
Sb with access to Reuters/Bloomberg
Could you post if they have the HP-Opteron thing please?
Thanks
K.
8-/
I'm interested in how many they sold.
Dont ask homework questions. Intel made a press release following each sale.
elmer ROFL - this post made my day
About the smartest insult for an analyst I could think of.
As a suggestion for any journalist following this thread, whenever an analyst blubber is obvious nonsense, just place the citation right between a Papster and a Stroligo statement.
K.
joe
first, I am not sure if it is a question of capability of Intels silicon at all. I would not be particularly surprised if Prescott has already what it would take to launch such a product. There is a lot of other things to consider for the right time to actually launch it.
If you wanted me to pin a dart on Intels current roadmaps X86-64 launch, I would aim for Jayhawk (which indeed is same silicon as Tejas).
K.
jackthex
Thanks, ok, i have read this one when it came out. K.
joe
expressis verbis: Not a question of if, but when.
From the context, that would not be anytime soon.
For my eyes, Pats smiling looked somewhat strained while answering questions about AMD64. He also frankly admitted he recognizes the market perceiving value of 64-bit already today, just because it will be coming.
K.
Pat Gelsinger on AMD64
http://zdnet.com.com/1601-2-5142562.html
The last three minutes of the (ca. 20min) interview.
Besides, the whole interview is worth to listen to.
Enjoy.
K.
wmbw
the point is that low volumes are acceptable for high ASP products, especially when you figure the margins are probably higher.
Well, that consequently follows your opinion IPF has and will have an USP unassailable for others: Then IPF can make a closed shop - market like mainframe-CPUs could do in the 60s, 70s and 80s.
I dont see these times coming back.
K.
yb - lol - eom
wbmw
I think that Intel would benefit the most from keeping IPF higher margin to use it as an incremental ASP lift, rather than completely commoditizing it top to bottom.
We discussed earlier the USP necessary for this strategy (and concluded that we have different opinions on this matter). For now, i wont argue against IPF could have an USP. I wont even argue it would allow to reach a significant part of serverspace and parts of the workstation-segment as well.
Even assuming all that - which is basically your argument allowing higher margins - and the strategy you propose, it would result in relatively low volume (at least for Intel-relations). Say a million per year, or even two or even three, which is fairly optimistic for a high margin strategy.
Problem is, every COTS strategy (like Xeon and Opteron) combining manufacturing volumes of server- and clientspace will yield economies of scale of one order of magnitude higher than IPF. In case of Intel, it could even be two orders of magnitude.
Income from that transferred via R&D from generation to generation from node to node into performance and cost is something very tough to compete against with a low-volume-high margin strategy down the road.
K.
CG
Nicely put it upside down. Well, if I had not lived through IBM dropping the ball on PCs a while ago (did you, too?) I could maybe follow your argument.
However, I agree: As long as Athlon64 is running 32-bit systems faster than everything else, there is no problem. Now, executing 32-bit software under WoW within a 64-bit OS is another game. Not if it is considered as just legacy-compatibility, but as long as the vast majority of code will still be 32-bit.
But that is due next year only if I read the tealeaves right.
(It's counterintuitive, but imo AMD currently (and going forward all the way through this year) is not at all disadvantaged by the lack of Windows-AMD64).
K.
timthex
Nicely said - i mean the content behind your name. Accidently have a link handy to the THG-piece you mentioned? K.
sgolds
Sorry having confused you.
I see your point. If I wanted to use X86-32 only for a console you bet I would keep my fingers from using EL-32 and use hardware legacy-support of Itanium.
(I mean, that is if I ever would consider using an Itanium-Server.)
K.
joe
If MSFT cared enough....
Now that you mention it...
Seriously, from what I hear about the public Server-64 beta WoW does not execute every 32-code right currently, some it wont eat at all. Especially installations of applications seem to be concerned. But well, thats what betas are for.
K.
CG
Shouldn't you mention what happened to FX32! and Alphas?
I mean this is probably what we could learn most for EL-32.
This kind of merges to the other discussion: As it was for the Alphas, Itanium can hardly keep the pace of scaling expected for COTS.
FX32! at least showed superior X86-Performance (compared to Pentium Pro) at some point, for a little while on Alphas.
Now, EL-32 shows X86-performance level of Xeon 1,6 for the fastest available Itanium-model. (And Xeon 1,6 is not exactly a top 32-bit performer) Actually a Pentium3-based Xeon 1,2 is (way) faster.
So where you go with EL-32 is from PII to PIII level X86-performance; but not anywhere close to current performance levels.
However, at least it makes Itanium useable for practical purposes, so it might help a lil bit. I could imagine the X86 performance-level available now could be sufficient for those who intend to migrate to EPIC-code really fast. I have no clue at all how many of these are out there.
K.
cg
Thanks. 2006 will be the time Opteron most probably will be dual core already (90nm). If it works out like this, possible improvements from a clean IA-64-design would come too late to be impressive in my book, even if it is a LV-quad-core CPU:
Too little performance-distance (if at all) to allow making up for a new segment.
K.
wbmw
Completely agree. This one made a nice laugh for me:
Or it might decide to pull in multiple gate mosfets, which are at least two quarters away from reality. For reality, read production.
Welcome to Legoland.
K.
OT Paul
As a suggestion, just make it a link quoting what you think is worth hyphenating and let Mike have couple of hits with it as well, fair enough?
K.
mas
Thanks. Figure 8 on page 10 of your link confirms your estimate (performance of EL-32 of Itanic 1,5GHz being equivalent to Xeon 1,6GHz).
That would make it useable for X86-code, unless... - I never bumped into an emulation without any issues within the last 20 years. Did you?
K.
p.s: I might add I would expect issues for WoW-32 for the very same reasons; although less and easier to kink out, because the complexity-level is way lower here.
mas
While we are at it, has anybody heard anything about how X86-emulation layer for Itanium performs?
Or, maybe the better question, which issues are known for it?
K.
cg
Thanks. When is Tukwila to be expected, on which node? K.
elmer
Would sure make things easier. Abandoning the bounds of legacy could turn out to a be a lucky strike bringing voltage down and frequency up simultaneously.
(You know, just to keep it alive for a while longer. I sure would miss our Itanic-discussions. )
K.
cg
That is interesting.
It lately crossed my mind that the X86-logic part of the design is obsolete now. Do you expect a "clean" EPIC-design going forward? K.
cg
Refering to static leakage portion (subshreshold-leakage), for a 3GHz+ design you would have to choose a transistor geometry different from what you would choose for a 2GHz+ design, resulting in different static leakage-characteristics. However, this portion of leakage is not the challenge nowadays (although not neglectible, as it still contributes significantly). Dynamic leakage is predominant already, more precisely the gate leakage portion of it. K.
cg
Leakage isn't very sensitive to clock rate but it is to transistor count ???
Well, if you have a patent pending for a transistor design behaving so, you will be filthy rich very soon.
All known transistors show exponential correlations of frequency vs. leakage in current nodes, whereas it obviously goes linear with transistor count.
K.
Semi, yb
Duopoly is the economic term. You might look for oligopoly as well, most economists consider duopoly just as a specialty of oligopoly. K.
OT Keith check w:o eom
UpNDown
Yes. Although i guess it will take some time to really digest the messages that came across yesterday.
FASL took the NOR-Flash market leadership already in Q3, but instead of bragging a lot about it extended the lead in the last quarter at impressive pace. (Again, without a lot of bragging about it. I will refer to that below.)
Even more important: Looking at the numbers, FASL is also cost-leader in this market: At 566M revenues, Intel would hardly had broke even given the revenues and losses for its division. (Intel well ahead of FASL in migration from Floating Gate to Strataflash/Mirrorbit has to be considered)
Taking into account what the other players (e.g STM) are doing, the picture is pretty clear:
-Floating gate is moribund.
-Strataflash is not cost-competitive (!, see above why that is)
---> Mirrorbit versus NAND will be the game in NOR-land.
Now, on the fist glance Flash is just noise for Intel. Revenue Contribution is some 5%, if there is no chance to turn the business around they always can simply write it off enjoy tax-benefits for it.
But in the context of Intels integrated manufacturing model (converting written-off capacities to Flash) the impact of bailing out of the Flash-business would be far greater than single digit percentage wrt 90nm capacities they build up.
Then, this all could be a problem in a more important dimension: I mean looking at numerous adventures of diversifying the "Intel-omnipotence theorem" has been falsified many times already. But when it comes to core business and it comes to AMD at the same time, it could be perceived differently.
K.
ps: On a side note, maybe AMD-management's expectation of analyst's intestine passage of its number could has been a consideration to push out the report as long as possible? (if so, they seem to assume chronic constipalation here, I am talking about eight days.) It would also explain why they are not bragging, let alone explaining what is going on - for the time being.
Congrats Buckwheat
for winning the contest. Great Call! K.