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K8L is really K10 .
You say I took the name in vain.
I don't even know the name.
But if I did, well really, what's it to ya?
There's a blaze of light in every word,
It doesn't matter which you heard
The holy or the broken Barcelona.
This is actually a pretty disappointing roadmap
Come on, it looks like Barcelona will be at a fairly decent quantity & frequency by the time Nehalem launches ;)
IIRC Allendale went into production together with Conroe and it's only smaller because its cache is only 2MB.
I would say the real Allendale only is in production for a few months.
I wonder if "Conroe-L" Celeron is Allendale or again a new 70 mm^2 die. Might be worth the effort if they plan to use the small die for ULV products.
Intel accelerates Core desktop ramp
new guidance:
http://www.hkepc.com/bbs/news.php?tid=733028&starttime=0&endtime=0
old guidance (Dec 2006):
http://www.hkepc.com/bbs/itnews.php?tid=714636&starttime=0&endtime=0
main difference:
- Core based Celeron and Pentium E series intro in Q2 rather than Q3.
"Wonder when Intel can demonstrate 4 sockets and 16
cores?"
Intel Caneland, Tigerton demoed and pictured (Oct 25 2006)
running Povray
http://www.techreport.com/onearticle.x/11099
Energy Efficient Netburst
Cedar Mill Pentium 6x1 series will go from 95 Watt FMB to 65 Watt FMB
http://intel.pcnalert.com/content/eolpcn/PCN107094-00.pdf
I say: use the Cedar Mill to drive AMD into the deep red in the first half of 07.
Small die size. Hyperthreading. High Ghz. Big cache. Celeron pricing.
with all the recent steppings(Kentsfield B3, Allendale L2, Cedar Mill D0) Intel's 65 nm process is improved even more.
Hector must be Superman, case closed.
And when he's hungry, he turns into Supperman.
(Bob Dylan joke)
wbmv,
> Sounds like 3.46GHz (2.66GHz * 1.3). That would be excellent
> for quad core.
My guess is 2.33 Ghz 80 Watt TDP for Clovertown vs 3 Ghz 80 W TDP for Harpertown.
>I know what Tukwila is, but what is Beckton?
> Is it not the platform name?
googling for "Intel Beckton", it's a xeon mp nehalem part.
also matches the color coding of those sgi slides.
SGI server roadmap
http://www.cse.clrc.ac.uk/disco/mew17/talks/Masters_SGI_Daresbury.pdf
- Harpertown 30% more performance than Clovertown
(5.5 TF/rack vs 7.2 TF/rack) .. btw what does GF/W mean W = Watt ?? :)
- Montvale mid 2007
- Tukwila and Beckton ( x86 CSI ?) with Numalink5 in 2009.
new xeon 5335 makes sense,
before:
xeon 5150 2.66 GHz DC 1333FSB - $690
xeon 5320 1.86 GHz QC 1066FSB - $690
now that's a 40% frequency handicap and a slower fsb for the QC model.
new model:
xeon 5335 2.00 GHz QC 1333FSB - $690
i guess the 5320 and 5310 QCs will drop in price.
Timna was a beautiful product and it's a shame it never hit the streets.
Well my guess is that Timna will be reincarnated as Steeley:
core 2 duo + graphics + mem contoller on a single die, manufactured in P1265 process .
tigerton wafer
http://news.com.com/2300-1006_3-6128108.html
"Intel showed off a 300mm wafer of dual-core chips that will be packaged into Intel's quad-core "Tigerton" processor."
Tulsa rocks on SAP-SD
Also impressive performance/$ gains
http://uk.theinquirer.net/?article=33707:
Tulsa 3.4GHz/800Mhz/16MB is $1,980.
For comparison, from the latest intel pricelist
Paxville 3Ghz/800Mhz/2x1 MB is $3,157
single core Potomac 3.3Ghz/800Mhz/8MB is $3,692
http://www.intel.com/intel/finance/pricelist/july_27_06_1ku_price_final_web.pdf
still, Intel might have to drop Tulsa prices again in a few months (scorched earth strategy before Caneland :) )
To the chipset, prefetches and regular cacheline loads look exactly the same, and it will simply see them as requests coming from different agents. Therefore, it's up to the chipset fairness algorithm, not anything relevant to the processor.
Well, I assume "agressive" prefetching means speculative prefetching - getting data that might be needed.
For a uniprocessor , there is no problem if data gets prefetched but then isn't used at all.
but on a multiprocessor load (i.e Clovertown), that's stealing bandwidth for the other loads.
I'm no chip designer , google doesn't seem to find much, so I better shut up now..
Wouter, Possibly, but the way it's been explained to me is that "real" loads always get to go before prefetch requests, so it should never interfere with normal operation too much."
.
Well my reasoning was that because Clovertown is 2 dies on a package, there could be problems that one die is getting stalled by prefetches from the other. We'll see in 2007 :)
on prefetching
Wouter Tinus:
Woodcrest will use the
most aggressive settings and Merom the most conservative ones.
that's cool ... then Clovertown can use one of the less agressive settings to save bandwidth.
Nehalem with 32 threads per chip?
"We have lots of duals out already, and we have quads and octs under development. Each of those cores can support multiple threads of execution. You can have 16 or 32 threads each."
Gelsinger interview - "What’s Changing Inside Intel?"
http://www.reed-electronics.com/electronicnews/article/CA6329160.html
You mean slide 46?
yup.
That would be a >1 GHz ARM V5TE compatible core
with 512 KB L2. No doubt Apple could do something
pretty cool with that.
In the meantime, let's hope Apple comes out with x86 new products soon. iBook succesor is coming, but I'm also hoping for:
- cheap Celeron M mac mini
- a subnotebook based on Core Solo ULV
More intel slides
http://media.corporate-ir.net/media_files/webcast/2006/april/intel/PDF/SAM-42606-afternoon.pdf
I replaced "morning" with "afternoon" and it worked :)
NB:
slide 12 : dramitically lower power mobile platforms coming
slide 48 Intel system on a chip (probably not x86?)
duke,
Pentium D = Pressler = 2 x Cedar Mill
Pentium 6x1 = Cedar Mill
don't know why inq posted this, cedar mill was launched in january.
hm I might be an April fool ...
Conroe roadmap
http://tweakers.net/nieuws/41855/Introductie-Intel-Conroe-in-twee-fases.html
if this wasn't posted by Wouter Tinus, I'd call it fake.
This roadmap from hkepc is much more realistic:
http://www.hkepc.com/bbs/news.php?tid=575315
Does that mean that Intel is putting AMD processors in them?
Yes, in the Kongo and Iraq versions.
"Less stable than your country" will be the marketing slogan.
Thoshiba's first gaming laptop with Core Duo
http://www.pcmag.com/article2/0,1895,1943298,00.asp
"In addition, Toshiba plans to update several of its mainstream units, the Satellite M105 and A105 series, with Intel Core Duo processors"
Of course, Toshiba will completly switch to Turion on April 1st, when the intel only contracts run out ;)
price war between a 90 sqmm bulk chip vs a 200 sqmm SOI chip ?
should be "fun" for AMD.
of course AMD won't have the volume to hurt itself.
DigiTimes seems full of self-fulfilling prophecies with all it's "Intel pricecuts sooner" stories lately.
wbmv,
well the more I think about it, lots of companies might be interested in replacing "Vista" with "Viiv" as the hype-word for the second half of this year.
Intel new integrated chipset + NGA chips could be a lethal combination against AMD.
I'm interested how good 3d performance will be on G965.
"content is to Viiv is what wireless is to Centrino" -Don MacDonald, vice president and general manager of Intel's Digital Home Group
http://blogs.zdnet.com/BTL/?p=2760
"Whoever thinks we will have brand traction [with Viiv] in three months doesn't understand branding. Centrino [Intel's wireless brand] is still infant as a brand, and now we have fresh fish like dual core. Branding takes years…it is supposed to be a shorthand way to make a simplifed purchase design"
"embarrassment of Montecito" - Pat Gelsinger
http://news.com.com/Intel+acknowledges+Itanium+mistakes,+predicts+strong+future/2100-1006_3-6053419....
"We did a top-down look" at Itanium, Gelsinger said. "We looked at the road map--the embarrassment of Montecito--where we needed to be with Montvale, with Tukwila, with Poulson, and what does it take to execute."
Damn a 2 Ghz Montecito in Q405 could really have shown IPF in a great light (even for Dell against Paxville).
wbmw,
i'm only talking about the "sound" of the brand names to average joe. the U.S retail numbers might support my theory :)
with Cedar Mill Intel could now have its whole line desktop line in the 4 ghz range.
halve the die size, no multichip package etc.
As an alternative, they should rename "Pentium D" to "Pentium Duo" , and release a "Celeron Duo" .. and then start a "OMG i can't live without duo" marketing campaign
wbmw,
Look at those Power Reductions!
it's good news for Dempsey..
still I think Intel completly failed to generate any hype for the "Pentium D" brand.
they might have been better off staying single core + HT.
A "4.8 Ghz Pentium 4 with HT" sounds way better than "Pentium D with 3.4 Ghz" , especially compared to "AMD 64 X2 4800+"
Pentium EE 965 released ...
http://www.techreport.com/onearticle.x/9627
new C1 stepping...
Intel can play the stepping game,too..
I wonder if the IDF Conroe samples will be the final release steppings ...
webcast with Core chief architect Ofri Wechsler.
http://www.intel.com/idf/us/spring2006/webcast.htm
I didn't like the idea of losing 80 bit capabilities.
Thanks for proving once again that you have no clue what you are talking about.
keith,
i live in Germany,too.
I don't think a 1000 Euro notebook is a "supermarket niche" product.
Nonsense.
Austria is not Germany.
mas ,
some time Linus will roll over in his grave for calling you smart on RWT...
i pity the poor pete...
getting trashed that much ..
and all this because he looked up "LRU" and "linked list" in wikipedia and thought he could deceive somebody.
Si tacuisses , philosophus mansisses .
kpf ,
priceless comedy ...
you are perfectly imitating the "I fried my brain trying to overclock my Athlon" AMD idiot ..
Hillarious. Keep it up.
SPARC laptop for you , Mister Placebo .
Xeon VID Range:
Normal: 1.2875-1.3875 V
MV 3.2Ghz: 1.2125-1.3875(!) V
LV 3.0Ghz: 1.05-1.2V
I guess the MV line will become more important if Intel moves the normal Xeon TDP to 130W with Paxville or Dempsey.
more at ftp://download.intel.com/design/Xeon/datashts/30624902.pdf