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Paul, tx. I've read them all now (I didn' know they were right at the bottom of the page). They seem logical, normal and fair to me.
Kind regards,
Ixse
Keith, thanks! + would highly appreciate the details when you do have the time.
Kind regards,
Ixse
More on CSFB call: AMD CFO Says 4Q To Be Seasonally Strong
Thursday December 4, 11:54 am ET, By Donna Fuscaldo, Of DOW JONES NEWSWIRES
NEW YORK (Dow Jones)--Advanced Micro Devices Inc. (NYSE:AMD - News) Chief Financial Officer Robert Rivet said Thursday the chip maker as well as the industry will see a seasonally strong fourth quarter.
"Christmas will happen. Demand is definitely there," said Rivet during a presentation at the Credit Suisse First Boston conference, which was also broadcast over the Internet.
According to Rivet, AMD started to see a build up of demand in the third quarter, which has carrythrough into the December quarter. He said "feature rich" cell phones will be a hot item for Christmas, with more camera-equipped cell phones being sold than digital cameras this holiday season. AMD makes flash memory chips used in cell phones.
As for the microprocessor business, Rivet said that business will also enjoy a seasonally strong fourth quarter.
Recently, shares of AMD were trading down 1.3%, or 24 cents, to $17.06, on volume of 3.9 million shares. Average daily volume is 12.9 million shares.
Ref: http://biz.yahoo.com/djus/031204/1154001018_2.html (via NG/SI)
I can't rhym this yet with what the SI person's heard (see prev post).
Kind regards,
Ixse
(edited) sgolds, CSFB call tidbit from Kamdar/SI
Wonderful, AMD says, "still losing money, but getting pretty darn close." With a 3 cent expectation, I'll take that as a warning. Ref: http://www.siliconinvestor.com/stocktalk/msg.gsp?msgid=19561363
So you're right, it's definitely not good, but not a big disaster either.
Questions I have are: Why's flash improving SO SLOW for AMD? Why aren't they in the same pallpark as Intel with % of rev growth for cpu's (presume costs did not skyrocket)?
Kind regards,
Ixse
Sparc still glowing, insists Sun
By Rachel Fielding SunNetwork 2003 in Berlin [04-12-2003]
High-end Sparc servers 'absolutely strategic' despite move to low-end
Senior executives at Sun Microsystems are seeking to reassure customers about the long-term viability of its high-end Sparc servers, despite admitting that the real growth area is at the low-end market.
Speaking at the company's first ever Sun Network customer event in Europe, senior executives insisted that the tie up with chip manufacturer AMD with its 64bit Opteron processors, announced at Comdex a couple of weeks back, did not signal the end of the company's Sparc range.
Scott McNealy, chairman, president and chief executive at Sun, told delegates: "We are ramping our investment in Sparc around multithreading. With AMD we finally have an x86 product that's worthy of Solaris.
"Sparc is absolutely strategic. We're growing our development in Sparc products. We have to develop the complete lifecycle from the core of the instruction set to the Java card and back again."
"We think we have huge value to add in the Sparc Risc space, and we think AMD is a nice follow-on to the Xeon."
Neil Knox, executive vice president of volume system products at Sun, added: "The customer benefits of using Opteron are investment savings and the ability to run 64bit applications on the same chipset."
Knox explained that Sun was the first vendor to adopt the Opteron chipset across all its product lines, and will begin rolling out products from the first quarter next year.
"We are totally committed to Sparc," he stated. "It's a strategic technology for the company. Opteron bridges 32bit and 64bit. It's just ideal play."
But there are no plans to introduce an 'Opteron Inside' brand to compete with Intel, according to Knox.
"The Sun brand is strong enough," he said. "We see continuing need for high performance, highly scaleable systems."
Meanwhile Sun chief strategy officer Mark Tolliver maintained that the company's focus is on aggressively driving down the cost and complexity of systems, even at the high end.
"We have introduced a game-changing proposition in the way software is sold," he said.
Ref: http://www.vnunet.com/News/1151246
So Opteron is the only x86 cpu worthy of Solaris, and is, probably for a considerate time, additional to SPARC. (OTOH what else were they going to say?).
Kind regards,
Ixse
Joe, re: HP's Finkel on SUN.
Although I agree mostly with you although I think SUN's meddling on the desktop might turn out hugely beneficial in China depending on the details of the deal, and more generally in any case a government body decides to adopt it broadly.
Agree with 'some kind of interoperatbility between Linux and Solaris' (IBM is doing something similar with server management software for AIX and Linux).
Agree too that SUN needs to compete with Dell, and would like to add that I think they can by adding value through hardware, software, and enterprise service (I'm not so sure that they'll need to go Windows as you are to do this effectively in their current markets as Linux might do just fine here). Also I think competing with Dell will only be possible in selective segments (e.g. web servers).
Some additional routes: If SUN can provide hardware for servers with >8 Opteron cpu's then that might them help too. Maybe by buying that new company that accomplished something similar already (forgot the name, was it OctigaBay?).
Maybe just to counter balance a general feeling here I think SPARC isn't completely dead yet, it's only bordering end of life, like a family of people that are becoming a bit of age. It might see patches (like help from fujitsu), and also might see a revival in a couple of years time. Yes difficult, but not necessarily completely impossible just yet.
They potentially can offer value add hardware, value add software, and value add services (all mostly based on standards).
Kind regards,
Ixse
Keith, what are the rules exactly for posts on this board (for off topic, non polite, name calling)? Does everyone know them?
Provided the rules are clear how do you make them known?, and, how are they enforced? Can we view them at any time if we want to?
Can posters be expelled for a short period? What is the process for that?
Kind regards,
Ixse.
Elmer -
I agree that you need to pick one or the other. Picking one will have a negative effect on the other and visa versa. I'm just saying AMD might have shifted the emphasis of one over the other a bit, not radically. Like resulting in a bit higher bin split in exchange for a bit lower yield. (Not like what you sound to me it resulted in a much higher bin split in exchange for a much lower yield). I have not implied anywhere in the discussion that AMD got the benefits of both, if you think that you misunderstood me.
Maybe this helps: I'm talking about e.g. 3% narrower channels (resulting in a bit higher bin splits and a bit lower yield), while you sound to me like you talk about a 20% narrower channels (resulting in much higher bin splits, and much lower yields).
Re: You don't target a wider spread, that's like having poorer quality equipment with worse control.
You're probably right. I know btw that's what it's like, but thought that despite that being a controversial idea, it might have resulted in better revenue for AMD (e.g. at the moment they temporarily introduced the Thoroughbred Athlon 2800+ which was later replaced by Bartons). As stated I'm far from sure this happened.
Kind regards,
Ixse
Re: Max power of 90nm K8.
Let's see Prescott is different from Northwood in that it has quite a bit more transistors most of which is because of the larger L2. It uses strained silicon which is supposed to either allow higher frequencies or save power. It has a vastly different layout because of new design tools that helped streamline data flow and allowed getting a much better clock distribution.
A 90nm Opteron is different from a 130nm Opteron, not in that it has more transistors (1MB L2 Opteron will have about the same amount of transistors), not that is uses a better add on fabrication process like strained silicon (it just continues to use partially depleted SOI), and it doesn't have a vastly different layout either. It's not that different at all.
This is going to be a very BIG WAG considering my limited knowledge but here I go:
- 20% power because traditionally going to the next generation process reduced power/heat considerably
+ 10% power for added leakage because of smaller gate proportions (this effect was worse than anticipated with Prescott and is bound to have some kind of similar effect on Opteron)
I'd say about 10% less then currently. I know someone else will be much better in this than me, but I wanted to have my go at it too.
Kind regards,
Ixse
Elmer -
Re: If you are saying AMD didn't target faster transistors then you have to find another way to explain the low fab output.
Nope. I'm saying AMD could have targetted faster transistors in two ways ('could' as I don't have solid info on it but think it well possible):
- I think they targetted higher average bin splits decreasing yield a bit (e.g. less than 10%, a wag I do admit). As said here our emphasis is slightly different because you're more or less saying they increased average bin splits a lot therewith decreasing yield a lot, while I'm saying they used this tool only moderately increasing bin splits only a bit while decreasing yield only a bit.
- I also think that at a moment in addition to the above they might (like in 'not impossible') have temporarily aimed for higher high end bin splits by increasing the spread (and therewith also will have yielded more lower end chips too as side effect). This might have been the case when the first Thorougbred based Athlon 2800+ were out, that got later got completely replaced by Bartons.
(-Lastly, just to be complete, don't forget that the best way to increase bin splits while maintaining yield is process improvements, and chip design improvements, both of which they will have tried to the utmost of their ability and with much more eagerness than either one of the two above mentioned ways. They're doing this and they're good at it too, e.g. note in this context that they have for instance invented a way to feed information from one processing tool to the next that is examplary in the industry. But this way of obtaining higher bin splits is not what we were talking about here).
Re: Your choices: 50% fab output with [many chips with] low ASPs and low demand, or 50% fab output with [less chips but with] higher ASPs and yield loss. I see no value is pursuing the low end.
I hope the above makes clear that I think AMD did neither. At most they might have changed their transistor design marginally, not radically, to enable slightly higher bin splits. Your choices sound like the expensive extremes .
For those that don't know: I'm not an expert, but I did have some very elimentary training in chip design, and fabrication technology, most of which I've conveniently forgotten because of time. I never used it in any job. Most of the above is therefore based on a general feeling of how it could be, not on factual knowledge. So I am well able to miss the relevant point entirely in this discussion. So if there's anybody with better knowledge please don't hesitate to shoot my bit to pieces. I will complain though if I think the argument provided is not sufficient as I thought in this case.
Kind regards,
Ixse
Elmer -
Re: The problem is sometimes you can't have both. You want good yield? Binsplit goes down. You want good binsplit? Yield goes down. If the good yield produces slow parts that won't sell then you have no choice but to retarget for faster parts, but then your availability goes down.
I'm quite familiar with that logic. I explained the reasons why I think AMD has no alternative but to pay attention to both (yield because of low asp's, bin splits because no high or should I say medium margin chips). In my opinion both are equally valid drivers. I note you didn't disagree with either of them, and therefore have no reason not to agree with me here. I do agree with the last part that "Your finance people run the numbers and decide which one makes for the most $$$. , but in my opinion, as explained, that will have led them to quite a balanced transistor design. I think we mostly agree here, but are talking about emphasis (you think quite a bit more emphasis when to design for bin splits, while I think they're probably rather well balanced).
Re: It would not be a stretch to think that Intel is making some adjustments to their yield/binsplits for their highend products. As for overcapacity, it puzzles me too. They must have something in mind or they wouldn't be building at such a fevered pace.
Agreed. In addition to what you say above it is I think not impossible that they don't have a plan to fully utilize it. I mean if they would have such a plan we would know the rough outline of it because it would be a really obvious, like having more fabs do flash like AMD is transitioned their Austin fab. They could have simply increased capacity because they can, and because if they do then they'll have a best of the best.
Kind regards,
Ixse
Chipguy, Ibanker, given the qualifiers it sure looks true to me. I admit I was surprised at Intel's 100K Itanium cpu's number. I still feel I like I don't know all the details though... And until I do I remain slightly skeptical.
Still given the qualifiers the number of servers growth at a faster rate for Opteron than for Itanium (anything else would have been rather strange). The # of Opteron's / server will go up a bit next quarter or two because of better availability of quad Opterons. The # of Itanium's / server should go up too.
Also I'd be interested to know how many servers red storm is comprised of (I mean the customer I/F chip from Cray/IBM sort of blurs the boundaries between considering it 10K single processor servers, or a relative small amount of larger ones, if my thinking about it is right the latter is true). If so that will impact # of Opterons / server quite a bit in 04 and even more in 05.
Kind regards,
Ixse
Elmer, re: A light bulb is always drawing 100W.
Yep, but it's emitting part of it as light (15-20% or so I very vaguely remember).
Kind regards,
Ixse
Elmer, I'm not disputing what you're saying, except that I think the self limiting process works two ways. I agree it's likely they targetted their transistors to increase bin splits (a reasonably well known storyline), but they've got to sell them at rather cheap prices too (compared with what Intel's getting for it). So they've got to have a balanced transistor design that targets both high end bin splits AND yields - because neglecting either would only have resulted in even higher losses.
I disagree with Windsock that Intel's next generation 90nm process is good and stable while AMD's yields are piss poor using the previous generation 130nm process simply because the extent of both is unknown (or at least not published to my knowledge). Without data any remark about it is void, filled with holes rather than facts. He has stated no hard figures, and is very likely voicing his opinion as the truth without any qualification whatsoever.
Think about it: Intel has it's own trouble, has large fab overcapacity, so why wouldn't they optimize for bin-splits (ok they need to optimize profit too and need to balance bin-splits against yields too, but sowhat - so does AMD, right)?
It's completely possible that both bin-splits (if categorized by similar performance) and yields of AMD and Intel are comparable within e.g. 10% ranges. If you agree that's even a possibility then a lot of remarks about how much more Intel is better than AMD are feelings at best.
Kind regards,
Ixse
wbmw, smallpops, re: The Register states those are IDC numbers but I would feel more comfortable getting them from a more reputable source.
Here you are: http://www.bayarea.com/mld/mercurynews/business/7397043.htm (via Darbes/SI)
Below a quote from a post from Joe H/SI (http://www.siliconinvestor.com/stocktalk/msg.gsp?msgid=19555943 )
Opteron Itanium
2001 0 <1000
2002 0 <3500
Q1 03 0 1,963
Q2 03 5,140 3,250
Q3 03 10,746 4,957
Windsock, re: Normal capacity = normal yields x wafer start capacity
You know that I knew that very well. I refered to full capacity in my post because what you define as normal capacity is really the maximum / the best AMD is currently capable of producing (hence my use of the word 'full').
You don't give any solid information whatsoever - absolutely nothing. Hence you have confirmed your information void. You don't know anything hard about yields or bin-spits at either AMD or Intel. I asked you to post it, and you simply didn't because you couldn't.
Your email to sgolds about 35-40% yields is completely wrong too: Do you know how much of max capacity was available at the moment AMD made the remarks you claimed, do you know it was the full 5000wspw as you claimed, do you know how much of max capacity was needed to transition to the new 130nm SOI process, how much then was needed to transition to 90nm, was 180nm production already completely stopped (depending on the exact timeframe of your remark), how much was needed to produce chipsets, how much was needed for testing e.g. of new masks, how much was produced versus how much was sold, etc..., etc...
For AMD's current situation I'll add that it's very unlikely that you know how much of max capacity is for SOI only, or how much is for bulk only, or if both are produced on the exact same production lines (which is unlikely according to those I've asked). Equally unlikely is that you know how much capacity was added with the enlargement of cleanroom of fab 30 this year, or when it came on line, and how much of it is used now.
Repeating the other statement in my previous post you obviously don't have any hard figures of Intel's yields or bin-splits, not in general, not per fab, and not per process. That's relevant because you stated that you know that 'AMD limps along at poor yields' at 130nm while Intel already has good stable 90nm process. Posts on this board make it pretty clear that Intel has a whole lot of rather big fabs for the output they have.
Please do note I'm not an expert nor do I claim to be one. Please consider how many more questions an expert will be able to ask you to which you will have no answer either.
Do you see now these fabs hardly ever use their full theoretical capacity i.e. for sellable products? Do you see now how much you don't know? Do you see you don't have any factual basis for your remark that AMD's yields are limping poor while Intel's are good and stable at 90nm?
Either post factual yield and bin-split figures for AMD and Intel or consider your posts about this completely void.
Kind regards,
Ixse
Windsock, re: Yields are so poor that Dresden operates at only 50% of its normal capacity.
If yields are really extremely poor they'd need to operate at full capacity rather than half. Slip of the finger, right?
Anyways do you have any hard information on Intel yields? If so could you please post it?
Also if you have any information about AMD yields in combination with their fab 30 utilization rate, I'd highly appreciate it if you could post it.
You see, currently your remark is completely void; As I see it you have no basis for your remark, or if you do you didn't post it for as far as I've seen (apologize if you did but I really couldn't find it).
Also note that Elmer was allowed to post the information on fab 11x as it doesn't contain any information that can be used to the advantage of Intel's competitors - it just doesn't contain any real information (i.e. other than the fact that copy exact worked once more for their 90nm process; it's good news for Intel but it doesn't give e.g. a cost picture, yield figures, bin-splits, no details whatsoever) - it's a PR only like Keith said.
Kind regards,
Ixse
EDIT: I see it took me a bit longer to write this post than sgolds reply. I'll leave it because I'm interested to see if Windsock does have some meat for us.
Keith, tx for both of your posts today. (eom)
Chipguy, Windsock, re: All indications are Xeon outsells Opteron by much closer to two orders of magnitude than one.
Isn't that beautiful, considering that's likely to change quite a bit more than one magnitude next year?!
Kind regards,
Ixse
PS: I'm long, and see momentum in Xeon-like server sales clearly on AMD's side for at least the whole of next year, and possibly most of the year after that too.
sgolds, paul, re: IIRC, the latency with the extra hop through the "main" CPU is still less than a NB setup, isn't it?
I agree with sgolds. If my memory serves me right I've seen diagrams that make clear that the added latency of the extra hop makes total latency for the second cpu about as large as with a normal P4 NB setup (I think at the time it was compared with the P4 533MHz FSB version).
Ofcourse latency for the primary cpu will still be much lower.
And the average latency of both cpu's will be a bit higher than halfway between having the cpu directly connected to memory and a normal NB setup (it get's a bit higher than simply the average between the two because of simultaneous requests from both cpu's do happen but this is I believe a second order effect for the vast majority of applications)
That's the best I can give you from memory.
Kind regards,
Ixse
Paul, re: WOW. What would that 2nd CPU and a full load of RAM bring to the table?!
I think you'll find it slightly different than you expect.
I don't think two A64FX cpu's will be able to work together. The A64FX only has one 16b HT I/F that could IF AMD implemented its original specs for clawhammer be split up into two 8b HT I/F's enabling dual processor functionality (one 8b to second processor, one 8b to the AGP tunnel). With the one processor setup they're using now they have the 16b I/F to the AGP tunnel available. I used 'IF AMD implemented its original specs' because it looks like it didn't as the current FX spec doc does NOT mention this split of the 16b I/F into two 8b I/F's at all: http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30431.pdf This spec doc does however mention only one bidirectional 16b I/F is available. Therefore it's probably not possible that two FX cpu's can function in a dual processor setup.
It's about 100% sure that it's possible to put two Opteron 24x processors in this board enabling dual processor operation(that's what MSI designed it for to start with anyway). These processors have dual 16b HT I/F's (one 16b to the other cpu, and one 16b to the AGP tunnel).
Also the memory controller of the second CPU can't be used because it's not connected.
Lastly more than two dimms in this system will make the memory slower instead of faster in a lot of games as memory timings need to be reduced then.
In summary I think no dual A64FX setup is possible. Single FX setup is what is tested now and is therefore possible. I also think one will need two Opteron 24x's to make any dual processor configuration working using this board. This does btw not change Anands conclusion that this is simply the fastest gaming system available.
Kind regards,
Ixse
Chipguy, what's your reaction on these two posts:
http://www.aceshardware.com/forum?read=105054575
http://www.siliconinvestor.com/stocktalk/msg.gsp?msgid=19530507
Kind regards,
Ixse
Intel fall analyst meeting
8
12
18
19
21
30
31
32
34
35
36 (only posted for 100K Itanium units remark)
37
38
39
40
41
42
43
This is the link to slide #8. http://www.iian.ibeam.com/events/ccbn001/112003a_rk/browser/slides/slide8.jpg
The other slides can be found by replacing the 8 in 'slide8.jpg' in the above link with the corresponding page.
Kind regards,
Ixse
Re: The interesting part is who will not be there.
IBM or no partner at all?
Kind regards,
Ixse
Why does noone seem to think of Infineon? I mean why should that be impossible?
Kind regards,
Ixse
HailMary,
"xSeries systems can provide a complete migration environment, which systems ranging from uni-processor IA32 (the xSeries 205) to IA64 (the xSeries 382 & xSeries 450) to 32/64-bit Opteron (the eServer 325)." Ref: http://www-1.ibm.com/servers/enable/site/porting/linux/xseries/
"and The IBM eServer xSeries 325" Ref: http://www-1.ibm.com/servers/events/regionalsales/event_1028.html
"When you are installing PCI cards into the IBM eServer xSeries 325 server" Ref: http://www-1.ibm.com/support/docview.wss?uid=psg1MIGR-53215
Look at the systems management section on this page: http://www-1.ibm.com/support/docview.wss?uid=psg1MIGR-53336
The eServer 325 is mentioned in this eServer xSeries selection guide: ftp://ftp.pc.ibm.com/pub/pccbbs/pc_servers_pdf/uscog102103.pdf
The product numbers for the eServer xSeries 325 (see first yellow section) from another IBM website: http://babelfish.altavista.com/babelfish/urltrurl?tt=url&url=http%3A%2F%2Fwww-6.ibm.com%2Fjp%2Fd.... Original in Japanese: http://www-6.ibm.com/jp/domino02/NewAIS/aisextr.nsf/0/bce52758a8eac93949256d790074d13d?OpenDocument&...
It's mentioned many times in this spanish IBM doc: http://www-5.ibm.com/services/es/pdf/xSeries-14.10.03.pdf
And refered to in a Pentagon document: http://www.uspentagon.com/prodsearch_IBM.asp
There are 408 hits on google for the phrase 'xSeries 325' that isn't supposed to exist.
As you can see I'm more than a bit intrigued that I couldn't find you a better quote - I did see it in a much more definite form in an IBM whitepaper about two and a half months ago. Can't find it anymore though... Had a discussion about it too on the yahoo, but yahoo search doesn't go back far enough anymore. From looking at IBM's webpage it does look like they're now carefully avoiding calling the eServer 325 an xSeries product. I've got a rather clear recollection though that it was positioned precisely as such in that whitepaper. It makes sense too, as that's where it fits best when comparing the iSeries, pSeries (Power), xSeries, and zSeries. Their webpage currenly however seems to make clear it isn't in any series, and I'm starting to get the impression that the eServer 325 is the only eServer product that currently isn't in any series.
It might be that IBM is developing Opteron into a series of it's own? Currently probably a bit far fetched, but we'll see.
Thanks for your comment.
Kind regards,
Ixse
BTW, 325 number was long ago also used for Intel (Pentium Pro) based IBM systems like this one: ftp://ftp.pc.ibm.com/pub/special/server/325spc.pdf
Chipguy, you're misinformed this time. The IBM Opteron 325 is an eServer xSeries product. This makes your conclusion irrelevant. The "lower margins for all System Group products except xSeries servers"-remark could actually be positive for AMD (although by far the biggest part of it will be Intel based products).
BTW, I do appreciate your comments. Mostly those on other boards (RWT/Aces).
Kind regards,
Ixse
Novell acquires SUSE Linux + IBM eServer support deal (WOW!)
Ref: http://biz.yahoo.com/prnews/031104/sftu091_1.html (via mrrobmac/yahoo)
There's really a lot of news in that article. I'm pretty much blown away by the possibilities that this bold stratetic move on Novell's part opens. Pls find a complete copy below.
Kind regards,
Ixse
Novell Announces Agreement to Acquire Leading Enterprise Linux Technology Company SUSE LINUX
Tuesday November 4, 7:59 am ET
-- Novell expands its open source commitment and will become the first to offer comprehensive Linux solutions for the enterprise from the desktop to the server -- Novell will be the only $1 billion software company with a Linux distribution and the worldwide technical staff to support it -- Novell/SUSE LINUX to become the world's largest supplier of desktop-to-server Linux solutions and technical support -- Customers to gain worldwide technical support for enterprise Linux solutions from a company with more than 20 years of operating system experience -- IBM and Novell to negotiate extensions to commercial agreement with Novell/SUSE LINUX to support the IBM eServer line
PROVO, Utah, Nov. 4 /PRNewswire-FirstCall/ -- Novell (Nasdaq: NOVL - News) today announced it has entered into an agreement to acquire SUSE LINUX, one of the world's leading enterprise Linux companies, expanding Novell's ability to provide enterprise-class services and support on the Linux platform. With the open source expertise of SUSE LINUX and Novell's world-class networking and identity solutions and support, training and consulting services, Novell will be able to deliver Linux and all its components -- from the server to the desktop -- and give organizations a secure, reliable and mature Linux foundation. Novell will pay $210 million in cash to complete the acquisition. The transaction is subject to regulatory approval and the winding up of shareholder agreements. Novell expects the transaction to close by the end of its first fiscal quarter (January 2004).
This latest move follows Novell's August purchase of Ximian, a leader in Linux server and desktop solutions, and further demonstrates Novell's ongoing commitment to provide customers a full range of Linux solutions. Both the Ximian and SUSE LINUX acquisitions affirm Novell's commitment to promoting the open source model and developer community.
Novell today also announced that IBM intends to make a $50 million investment in Novell convertible preferred stock. In addition, Novell and IBM are negotiating extensions to the current commercial agreements between IBM and SUSE LINUX for the continued support of SUSE LINUX on IBM's eServer products and middleware products to provide for product and marketing support arrangements related to SUSE LINUX. Both of these agreements will be effective when the acquisition of SUSE LINUX by Novell is completed.
"Responding to customer demands for open, standards-based computing, Novell has been dedicated to a cross-platform vision for four years now, and Linux is an increasingly important part of that strategy," said Jack Messman, chairman and CEO of Novell. "The acquisition of SUSE LINUX will complete Novell's ability to offer enterprise-class Linux solutions to our customers from the desktop to the server. No other enterprise Linux vendor has the operating system experience and the worldwide technical support capabilities that Novell will be able to deliver. Novell is bringing our significant resources to bear to help customers adopt Linux with more confidence, giving them the freedom of choice Linux provides without the anxiety over whether an open source solution can truly be relied on for mission-critical functions."
"Novell understands the power of open, standards-based computing, and has been moving in that direction for some time," said Richard Seibt, CEO of SUSE LINUX. "Novell's global reach, marketing expertise and reputation for security, reliability and global enterprise-level support are exactly what we've been seeking to take SUSE LINUX to the next level. We've also been impressed by the incredible loyalty and competence of Novell customers and business partners, and we're looking forward to joining forces to help customers gain the benefits of Linux and to help Novell continue to expand its role in the open source community."
SUSE LINUX Offerings Complement Novell Linux Services
SUSE LINUX offers a range of Linux server and desktop solutions designed to meet the diversified needs of different organizations. SUSE LINUX Enterprise Server 8 for midsize to large companies provides a range of core networking services with the high-availability and scalability features needed for mission-critical environments.
SUSE LINUX is the leading enterprise Linux company in Europe. In addition, through its relationships with Conectiva and Turbolinux, SUSE LINUX has been a leader in Latin America and Asia, as well. SUSE LINUX is also one of the top providers of Linux to enterprises in the United States and North America. Novell's extensive global sales and channel programs, proven and reliable technical support capabilities, as well as ongoing Novell and SUSE LINUX relationships with key partners like IBM, Oracle, SGI, Fujitsu-Siemens, Dell, Intel, AMD, SAP, HP and others, provide a powerful business network to promote more rapid Linux adoption around the globe.
Novell's Linux Strategy
The acquisition of SUSE LINUX will be an important step in Novell's efforts to accelerate enterprise adoption of Linux. Novell began building solutions for Linux in early 2000, when it made its flagship eDirectory(TM) technology available on Linux. In April of this year, Novell announced it would make all the services that run on its NetWare® operating system run on both the NetWare and Linux kernels in the future with the full range of Novell's worldwide technical support. In August, Novell acquired Ximian with its leading Linux desktop management solutions and its visionary leadership to promote Linux desktops and to enable Microsoft .NET* applications to run on Linux.
In September, Novell announced the open beta of Novell® Nterprise(TM) Linux Services (NLS), an offering that runs on SUSE LINUX and Red Hat* and provides a variety of networking services for Linux environments. IBM, HP and Dell have all licensed the NLS technology for resale to their customers. With SUSE LINUX, Novell expands its reach to developers and ISVs looking for a complete Linux solution. Today's announcement of Novell's plans to acquire SUSE LINUX strengthens Novell's already proven set of Linux offerings by allowing Novell to distribute the underlying Linux platform itself, in addition to the many value-added services for Linux that Novell already offers.
"We chose SUSE LINUX because they are a clear market leader in Linux technology for the enterprise," Messman said. "With this acquisition, Novell will be the only billion-dollar software company with a Linux distribution and a worldwide ecosystem around it. A worldwide technical staff of more than 600 has been trained to support Linux. The acquisition of SUSE LINUX completes our technology stack from the desktop to the server."
Beyond the technology, the acquisition will also expand Novell's strategic commitment to the open source community. The combination of SUSE LINUX and Novell will deliver not only complete enterprise Linux software solutions, but also worldwide channels and industry-leading partnerships. The combined company will help promote a thriving, global open source ecosystem that creates innovation and choice for developers, users and organizations alike. Novell is firmly committed to open standards and maintaining the existing open source kernel development efforts. From advocacy and development resources to events and support of open source efforts like kernel projects, XFree86, ReiserFS, KDE, GNOME and Mono, Novell stands side-by-side with the open source community.
Citigroup Global Markets Inc. acted as Novell's financial adviser to the transaction. Clifford Chance Punder served as Novell's legal counsel. Arma Partners acted as financial adviser to SUSE LINUX and its stockholders. Freshfields Bruckhaus Deringer served as legal counsel to SUSE LINUX and its stockholders. SUSE LINUX investors are e-Millenium 1, AdAstra Erste Beteiligungsgesellschaft mbH and APAX Partners & CO.
Press Conference Invitation
Novell and SUSE LINUX will hold a press conference today at 11:00 a.m. EST (5 p.m. CET) to discuss the transaction in greater detail. The press conference can be heard live at http://www.novell.com/webcast .
Subzero,
Yes I did but it's not that relevant to the topic: We were talking about the difference in depreciation for 300mm and 200mm equipment only, not total depreciation.
Kind regards,
Ixse
Borusa, IBM processes 300mm SOI wafers in East Fishkill (eom)
(edited) Elmer, Re: Depreciation is included in the cost of the wafer.
I don't think so. The cost of the wafer is basically what AMD/Intel pay SOITEC, and whatever firm Intel uses as wafer supplier. So the depreciation of the equipment used to process the wafers is not included in the cost of the wafer itself. Ofcourse one can depreciate the wafers in storage, but that has absolutely nothing to do with the depreciation of the equipment used to process them.
If your argument is that depreciation is included in the manufacturing costs PER wafer, actually now I think about this it's what you must have meant, I think your argument is more valid PROVIDED they're using linear depreciation which I presume they do. However I still think AMD will be using the 200mm equipment longer than they first anticipated which might bring their depreciation costs down. Also I believe but am not sure that 300mm equipment, as it's newer, was relatively more expesive to buy for Intel then the 200mm equipment was for AMD, which would again mean relatively lower depreciation costs for AMD. Lastly in addition to the 300mm equipment I believe (not sure again sorry; I know they bought it and presume they're using it now but it might be that they use it for 90nm onwards) that Intel uses some of the newest lithography tools (shorter wavelength) which because it's new will probably add to relative higher depreciation costs for Intel as well.
Kind regards,
Ixse
Chipguy,
Did your estimate include depreciation costs of Intel's new 300mm equipment + more advanced lithography tools relative to that of depreciating AMD's couple of years older 200mm equipment?
Kind regards,
Ixse
sgolds, when I tried your link didn't work anymore. This one does (for me anyway): http://www5.pc.ibm.com/us/me.nsf/09e55013c121123085256be500536da2/3d0ea7cd6966966787256d91007000bc?O...
For a complete list of IBM webdocs incl the above see here (use Next at the bottom of the page to scroll futher): http://www5.pc.ibm.com/us/me.nsf/webdocs
Kind regards,
Ixse
Keith, I think that the analyst is careful because of lack of indicators for AMD desktop/mobile sales, so I'm mostly looking forward to earnings.
Banias: I've heard that although Banias is doing extremely well, that AMD mobile is doing OK despite of it (I'd say Banias grew Intel mobile sales a lot, but still didn't decrease AMD's mobile unit shipments).
Desktops: Thornhill was quoted as saying XP's are loosing against Celeron-P4 sandwich is maybe related to Intels strong growth remarks, and AMD's lack of equally strong growth remarks especially in the cpu area. As the overall market is growing too I think there's room for growth for both competitors at the same time. The INQ information indicates XPs should have sold well (but it might be more based on AMD wish information than facts). The analyst is already right when Intel is growing sales by 15% and AMD by 10%. Also it's not 100% clear if he means unit share (probably) or share in dollar terms (possibly but less likely imo) - so there's plenty of room for him to manoeuver.
FWIW, basically I think AMD will have a 'great quarter' (which is different from Intel having a great quarter because they earnings are black), and a more skewed towards NOR especially when compared with Intel (like most seem to think), and Intels more skewed to cpu especially mobile (nothing special here either I think). And I think the analysts are keeping to their previous low EPSs for AMD because they don't have direct info with regards to AMD cpu sales and history has taught them to be conservative. Also they might not have clear insight of cost regarding to integrating FASL (one time). Lastly I also think that prospects are improving for AMD (SOI, SUN, HP, availability of A64 systems, ...) and getting a bit worse for Intel (Prescott delay to Jan/Feb 04, power, and possible Tejas delay to 05, and their being absent from this years MPF where AMD's Fred Weber is said to do the key note speech). A bit of those approving prospects I think are bound to get visible in some remarks during AMD's earnings meeting.
Hopefully this doesn't contradict any information you have, and hopefully it contains some tiny useful tidbits, despite the fact that you're far more knowledgeable than me.
Kind regards,
Ixse
(deleted as it was already addressed)
Xeon 2MB / P4EE die size guess
(copy from my post at SI to check if the values are way out of wack or not...)
From Anand: "The 2MB on-die L3 cache takes the Northwood's 55 million transistors and balloons it to an incredible 169 million transistors."
P4 .13 Northwood is between 131 and 146 mm^2 (I found three differrent die sizes for .13 Northwoods 131, 140 and 146 in different discussions and I think the 146 is the most reliable: http://www17.tomshardware.com/cpu/02q2/020610/thoroughbred-07.html). There was someone (Bill Todd at realwordtech I believe to recall; can't find it back) that mentioned cache density of the large cache .13 Itaniums to be ~35mm^2/MB. Itanium large cache is optimized for density so it might in very general terms be comparable with Xeon L3 caches that are optimized for density too. So IF the density would be the same for Xeon/P4EE L3 and IF the 35mm^2/MB is approximately correct then that would amount to a total of between 201 and 216 mm^2 (I think the 216 figure is better than 201 because of above mentioned reason; and pls note that the 2MB L3 is in addition to the 512KB L2 of a normal P4 so the numbers can be added up normally). No idea if the 35mm^2/MB is ballpark though...
So again using the same ifs: IF true the Opteron is only slightly (in the ballpark of 10%) smaller at 193 mm^2 (L3 cache density is much higher than L2 density, ref: http://www17.tomshardware.com/cpu/20030422/opteron-09.html).
Anyone here have an idea if this is remotely correct?
Kind regards,
Ixse
Keith, YB, I think Intel was quoted to say the P4EE is the fastest gaming processor this year (no frequency related comment I heard).
Also the P4EE tested at Ace's is 3.4 GHz, while Prescott might be released at 3.2GHz to start with (instead of in conjunction with 3.4GHz release). And I'm only 99% sure that Prescott will see the daylight in '03.
Kind regards,
Ixse
Petz, Nocona is 90nm, and I think a Prescott derivate.
"
...
The Intel Xeon processor MP family for servers with four or more processors will be extended with a larger cache processor in the first half of 2004. The first 90-nanometer (nm) Intel Xeon processor MP (code-named "Potomac") will follow with support from a new Intel chipset (code-named "Twin Castle").
Intel will also continue to enhance its industry-leading Intel Xeon family for dual processor servers and workstations with a faster product in 2003 and its first 90-nm enterprise processor in the first half of 2004 (code-named "Nocona"). Intel disclosed an additional 90-nm processor (code-named "Jayhawk") that will follow Nocona. Nocona will be supported by new server and workstation chipsets from Intel (code-named "Lindenhurst," "Lindenhurst VS" and "Tumwater").
...
"
http://home.businesswire.com/portal/site/google/index.jsp?epi-content=GENERIC&newsId=20030917005...
Kind regards,
Ixse
Elmer, re: "Yes you missed the 2.8GHz Dell PowerEdge 6650 Xeon MP with 2Meg L3. You can find the SPEC scores on the SPEC page. Now extrapolate to 3.2GHz will near 100% scaling due to the faster FSB and you see what I saw."
They were for a 400MHz FSB already (bummer he?!), and with 4 x 1GB DDR3200 sticks too (not ECC or buffered or whatever). So there's no way you can apply 100% scaling.
That said the scores are pretty good already, although they're not entirely representative anymore for real world performance.
int peak: 1234
http://www.specbench.org/osg/cpu2000/results/res2003q3/cpu2000-20030630-02308.html
fp peak: 1120
http://www.specbench.org/osg/cpu2000/results/res2003q3/cpu2000-20030630-02304.html
Kind regards,
Ixse
Tx sgolds/wbmw.
I'm reading you have more information about this than myself, so tx.
BTW, I know that copy exact goes for the manufacturing process. I still think it's necessary for Intel because they've got many production lines in many factories, and not to AMD because they don't seem to have many production lines per product category. Hence I don't think it really can be seen as applicable to AMD's cpu fabbing processes.
Kind regards,
Ixse