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I'll try to answer your requests as I get a chance.
Well with a latency register you can have multiple requests outstanding w/o problem:)
Cheers
Cor
Isn't it really sad that Rambus went to all this trouble to design XDR because of one faulty oscilloscope?
LOL, I was joking of course, flame retardant suit on :))))
Cheers
Cor
Do you have access to the Motley fool to read? I can link you to a calculation I did some time ago (up to 1st half 2003, so needs a bit of extrapolating)
Cheers
Cor
Theejack,
That's what you get if you put out a press release :)
Infineon is not going to comment imo.
I am a bit surprised that Rambus wants to play the press in their lawsuits so much, a bit like Larry King.
Cheers
Cor
I guess if you're into chicanery. - elixe
So that's settled then <vbg>
Cheers
Cor
Elixe, Calbiker Micron and others (Denali, Artisan) on DDR2 enablement
http://tinyurl.com/yurwm
Denali Teams with Artisan and Micron on Webcast Series for DDR2 Enablement
PALO ALTO, Calif., Jan. 8 /PRNewswire/ -- Denali Software Inc. today announced that it has teamed with Artisan Components (Nasdaq: ARTI) and Micron Technology (NYSE: MU) to produce a four-part webcast series focusing on enablement issues for DDR2 SDRAM memory. The webcast events feature exclusive presentations from industry experts to address the key issues associated with designing and implementing DDR2 memory systems.
Event: Webcast Series: "DDR2 Enablement"
Cheers
Cor
No indication when the mobo might appear.
Cheers
Cor
Thanks Sandy, will change it in:
http://boards.fool.com/Message.asp?mid=20101222&resultcode=0059
and on my website
www.chipstocks.net
Cheers
Cor
(it is still not shown on the calendar on www.rambus.com)
Cal, I got it this time on the replay.
As Threejack said, not much new.
Note that for total dram royalties (if there is a full win) he talks about hundreds of millions, not Billions. (0.75% for sdram and 3.5% for DDR, which Sammy contracted for but is not yet fully paying)
I believe there is 10 Gb/sec product on the market but have to search for it again.
Another thing they still stand at 20+ licensees for RaSer, which is the same as in the last CC.
These people at Needham are pretty savvy. They are not going to just take tech talk and translate it into dollars w/o much track record there. I expect no upgrade from there but could be wrong.
Too short a session anyway.
All the best
Cor
Threejack, somehow I missed the thing. Each time it says that the presentation has not yet begun etc (even now)
Is there a replay possibility?
Did you see 41 slides?
Cheers
Cor
Sandy I have the earnings call at 12th jan.
Remember there is the Needham presentation (won't be long I guess, they do a lot of technology cos) in about half an hour from now:
http://www.wallstreetwebcasting.com/webcast/needham7/register.aspx?conf=needham7&page=rmbs&u...
Cheers
Cor
Temporary yes, but maybe two years, ugh.
Cheers
Cor
Fantastic find really by Kerry.
(I have seen those posts a few months ago on yahoo where she describes her phone calls with somebody at the court there:)
Cheers
Cor
Thks Threejack, I know not to be greedy on options especially not when they expire next week. Tried to sell a third today at 0.25 but the marketmaker was jollying around and put them back to 0.20 after trading a few at 0.25. I refused to lower limit so still have all. Probably will sel at 0.35 or .40 tomorrow if we get a little lift (a.h. up anyway on volume).
Totally btw, I am very bullish on their (MU) profits. I predicted months ago that they would break even past quarter and they will make good money this quarter ending feb; one of the things they do well is to sell legacy memory (sdram now), of which they have a 10% higher proportion than IFX and Sammy. (60-40 rather than 70-30). Sdram is now 50% more expensive than DDR, how about that?
Well you posted the market expectations yourself today, dram will be up and it's asps are already up. Capacity utilization is 95%.
Cheers
Cor
(I am trying not to love or hate any stock, best way to make money)
Yes checked those posts out. Some hilarious points especially in the serdes area. This stuff has been written probably 1.5 years ago or so. i don't know where he fished it up.
It talks about 2003 as the future as in :
snipInfiniband SerDes:
This is a box to box connection, which is a revolutionary replacement for fibre channel. Infiniband products will not be available until around June 2002.
3GIO SerDes:
The 3GIO bus is the new high bandwidth replacement for the PCI PC I/O bus. The PC I/O bus supplies the slots in the PC that things like graphics cards, disk controller cards, sound cards, video capture cards, ethernet cards etc, plug into. If Rambus actually got $2 for each RaSer in a 3GIO compatible PC card....
The first products for the 3GIO PC I/O bus are expected to appear around the middle of 2003.
yes if....
Cheers
Cor
Threejack,
do you know if I can watch this on the internet?
I do not have CNBC here (may have it later via sat in Spain)
Today MU was moving strongly the whole day w/o retracements, just stalled at lunch time. Over 14.50 now.
Suits me, I have 150 jan 15 calls, which I picked up cheap (I had plenty of flack about that;) for 0.15. Looks like I am going to make several 000 $$ off them. (after they first went worthless to 0.05, but that's options for you)
I wasn't fazed, but bought some 15s feb as well, which are now well into green.
Cheers
Cor
Guilty? (hahaha) No. I am not afflicted with guilt feelings about anything.
See ya again when that thing is running with 4 GB memory;)
Cheers
Cor
Cal, I was right, I knew you would latch onto that:))))
They had to go with hand-picked Corsair single-sided 256 MB DIMMs to make it work. And I bet that set-up is also risky.
And I bet they will have that fixed soon enough. I knew you would use this to detract from your statement that it would not take more than one DIMM, they used three (like in 3!!)
I still remember like yesterday all the posts on TMF saying that DDR200 was never going to work, against the laws of physics etc etc (remember the Evil Doctor?)
I am of course more interested in how they perform against Intel and that was quite satisfactory. Intel had a new Celeron today, no Prescott (yet, thank ...).
the interesting comment was that they had never seen in any tests such low latencies, which is something you should like.
Cheers
Cor
Hey Cal, have you seen these benchmarks?
(I will only do this once, tooting this AMD horn:))
http://techreport.com/reviews/2004q1/athlon64-3400/index.x?pg=3
They got the CAS at 2 now. (Corsair memory) Only one memory channel on that new 3400+ model, but doing great. They also used 3 DIMMS.
I think I will wait a few months before buying my superlaptop for beneath the palm trees. (17 inch screen etc) I want a A64 laptop.
Cheers
Cor
So eventually we may finally see a DDR memory controller off a Hypertransport bus (something I predicted years ago). Imagine how much memory you can put on that at lareg distances:)
Different hierarchies of memory as with L1, L2, L3 cache, some connected to the memory controller and some to the HT controller.
Or what about memory chips with built in HT support?
I know already what you are going to say, Cal:)
Cheers
Cor
Btw talking of Cadence, they have a PCI-Express module (IP library) and it does not contain Rambus technology.
I checked that in the last two weeks directly with Cadence.
I know there have been assumptions in the past about this relationship due to previous PRs.
Cheers
Cor
You all, who are here, also a Happy New Year.
Especially to Elixe, Threejack, Sandy and Calbiker , but also to all others who may be posting or lurking here.
Thanks to Threejack's efforts this has become a very informative board (not too many legal posts, t.g.), where a discussion is possible. (ha?)
And because it is not flooded by 1000s of posts one can usually find an old post w/o too much trouble.
So to all: Health, Love and Wealth (maybe some will be multimillionaires at the end of the year, probably not me, but I don't really need it I am happy with the first two:)
Cheers
Cor
Duh ?? Calbiker get that track dust out of your eyes...
In each case, you listed XDR being slower (greater time) than DDR. It's BS!
Look again and again and again, please.
Is 28.8 smaller than 40 ??
Is 37.5 smaller than 110 ??
Is 107.5 smaller than 670 ??
Those are three numbers in my table. For every one of them XDR is faster than DDR, don't try to put words into my mouth!!
We are talking about the exact same core when dealing with DDR400 or XDR3.2. The cores have identical latency.
Of course, knew that ages ago. We need an inventor for a new core...
My whole argument is that in terms of nanoseconds (=time) the latency is BIG for XDR compared with the transfer time for a bit, which makes it very likely that on real benchmarks on a PC a XDR will not perform as one would expect. It will be faster than a slower chip but not by a factor of eight as is being suggested by the marketing blurb.
For PC's a 128 byte transfer is extremely small.
I don't know what the average transfer size is. It must be not all that big, otherwise the guys at JEDEC would have gone for a fixed burst size of 8 (or why not have 128 :)
As the (hypothetical) XDIMM transfers 4 bytes at a time, as you pointed out, we are talking 512 byte transfers already at the 128 bit transfer point of my table; at that point the eff. bw is only 27% of full bandwidth.
I am sure Intel will either make a lab rig sometime in 2004 to test real world performance, before they commit to a chipset for XDR. Or they will simply simulate it on the computer, as they would know the transfer times. I think for getting pieces of program 512 bytes is LOOOONG, but then you will say that is in the cache (all of it).
Cheers
Cor
Hey Cal, you show me where I said that XDR was not faster than DDR?
The time it takes for any transfer is shorter for XRD, clear.
I was showing, however, that for normal PC work, which involves a lot of short bursts of bytes (I was coming to that but wanted to check in with you on the table first, which from your answer I now know to be correct:), the advantage for XDR dimishes quite a bit.
You need long bursts of data (graphics?) to justify the extra cost (which there will be, no doubt)
Cheers
Cor
PS will be back, if not this year, then the next.....
Hey Calbiker
It only works when the data is interleaved (2 banks).
back in 1985 we were already two way interleaved on my simple 8085 256 KB board; the Eclipse computers from DG we were then selling you had a choice of two-way four-way or eight-way interleave, I guess to avoid the wait states.
I would be very surprised if those Intel controllers which cost some $ 50 M to develop don't have such intelligense. In fact I believe that the chipsets are almost as complicated as the processors these days.
What if the data is located in one bank only? The processor may just need 8 bytes. Can the controller make the correct decision to use the standard read method (no additive latency) instead of the posted CAS? I don't know, I assumed it could not.
When properly interleaved, successive bytes would not be in the same banks.
Then you have the problem of writes.
Writes are not a problem, except in streaming writing applications such as MPEG encoding. There is a feature in the software and disk hardware where writing can substantially lag the processing. Because writing is a minority operation it will catch up sooner or later.
Cheers
Cor
PS biked into any good mudslides these days?
Getting back to the effect of latency on effective bandwidth. which you explained in an excellent way in post #1073:
For read bandwidth (which for PC applications is the big one) I get from your formulas. for DDR400 and XDR3.2. respectively:
DDR400 latency 30 nsec
XDR latency 27.5 nsec
max bandwidth for DDR400 400 Mb/sec per bitline
max bandwidth for XDR 3.2 3200 Mb/sec per (pair of) bitlines
(correct me if wrong. I am not very good at this)
bits DDR400 XDR3.2
burst time eff.bw eff/max time eff.bw eff/max
1 32.5 30.8 0.08 27.8 36.0 0.01
2 35 57.1 0.14 28.1 71.1 0.02
4 40 100.0 0.25 28.8 139.1 0.04
8 50 160.0 0.40 30.0 266.7 0.08
16 70 228.6 0.57 32.5 492.3 0.15
32 110 290.9 0.73 37.5 853.3 0.27
64 190 336.8 0.84 47.5 1347.4 0.42
128 350 365.7 0.91 67.5 1896.3 0.59
256 670 382.1 0.96 107.5 2381.4 0.74
512 1310 390.8 0.98 187.5 2730.7 0.85
1024 2590 395.4 0.99 347.5 2946.8 0.92
Thanks for the correction, Elixe.
Still true that XDRAM suffers more in the effective bandwidth than DDR, due to the fact that latency is more bit times.
I am mostly interested in read effective bandwidth because reading occurs a lot more (factor of 10+) than writing in PCs.
Cheers
Cor
Hi Calbiker,
The point when I said that latency seemed relatively high, I meant it in relation to the bandwidth (or better the time between bits: 1/bandwidth)
In DDRx at 400 MHz clock we get a bit passed per line every 1.25 nsec, if I am not mistaken. In XDRAM we get a bit passed every 0.3125 nsecs (boy it is fast, hope it works;).
However, in DDR we are talking a latency of 40 nsec, equals 32 bit times. In XDRAM (best latency, lowest bandwidth) we are talking of 27.5 nsec, which equals 88 bit times. So in terms of bit times XDRAM has a 175% higher latency than DDR.
So obviously the effective bandwidth of XDRAM takes a much more severe hit vs. max. bandwidth than DDR does. Which makes XDRAM less suitable for run of the mill PC applications, but probably very suitable for specialised very streaming graphics or networking applications. (I even on this basis wonder if it is all that suitable for cell work)
How long have you been working with DRAM, Cor?
Hmm, you could learn something from my old world communication skills;)
Actually, I will answer that one. I least worked with dram in 1985 when I designed a dram controller with no wait states with a single latch and a prom, whereas the Intel controller (for 8085) needed at least one wait states, but hell that was when processors running at 5 MHz were fast;) (and the memory chips were 256 Kbit, from Hitachi afaik)
BTW, there's virtually no relationship between peak bandwidth and latency.
I can see that, but as you pointed out yourself, latency is a most important factor in determining effective bandwidth depending on the block size.
Cheers
Cor
Hi Elixe,
do you have any idea of the price premium they will be aiming for, say a XDRAM 512 Mbit vs a DDR2 512 Mbit?
Cheers
Cor
So the conclusion is that for the top model the latency is good.
Anyway it is important that Toshiba samples them now, because otherwise nobody can design and test controllers. Doesn't the PS need the stuff in 2005?
Isn't the latency high relative to the (theoretical) bandwidth. I should put it through your formula.
Cheers
Cor
Cal
Have you looked at those Toshiba Xdram chips?
http://www.toshiba.co.jp/about/press/2003_12/pr2501.htm
How does the latency strike you (choice of 27 and 35 nsecs)
Is that low, normal or high.
I have no idea at the moment how it compares with, say DDR400.
Cheers
Cor
Good find, Sandy
And the Toshiba link to this good news:
http://www.toshiba.co.jp/about/press/2003_12/pr2501.htm
Cheers
Cor
Thanks for the tip, I ordered the book
All the best
Cor
I understand your concern, Bob.
Look at what happened at Intergraph. (I was in for a year for a doubling 9 to 18, plus some calls)
The patents had long been declared valid and infringed by the courts and Intel just kept sueing. After more than a year of that Intel finally settled (Major amounts $ 300M plus $ 150M, some is still in the balance)
I have been out for over a year now and do not follow it closely, but the story is mostly here:
http://www.intergraph.com/ingrhistory00s.htm
So a FTC win does not automatically mean royalties will start flowing freely. There will be more battles, maybe for one to two years. I do not see Infineon, Micron or Hynix settling so it will have to be fought out till the end.
I am also very interested in the IDCC position. Do not understand the IP sufficiently to take a big jump. IDCC seems priced on present day performance which is good, upside surprises will do it a power of good.
Cheers
Cor
Elixe and to anybody else who looks in:
Happy holidays and may 2004 bring health, love and wealth.
Cheers
Cor
Hi Zeev
Euro at $ 1.50 would be a small disaster for my holdings, I just hope it doens't happen.
Anyway when it happens it will turn around again. I just hope it tops at 1.30
US economy (barring disasters like a nuke from al queda) recovers more quickly than the European and also the 30% dollar/euro change over the last year will have additional effects (like on Mercedes sales in the USA)
Merry xmas anyway
Cheers
Cor
Good sea boat from the looks of it.
Cheers
Cor
Well one can always hope. Are you married to Jane Fonda? <vbg>
Picture is a bit smallish. Is it a 55-60 ft?
Cheers
Cor
Hey Stowboat
did you put another pic of your boat up or is this the next desirable model :)
Cheers
Cor
Hey Elixe, thanks for posting that, I will take the liberty to repost on the TMF semi board, OK?
All the percentage calculations seem to be screwed up for some reason.
What I find even more interesting than the fast growth of Infineon (IFX is the fastest growing major semi co anyway) is the growth of Hynix despite their difficulties with the EU and the USA.
Cheers
Cor