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elmer
Pity.
K.
p.s: I was vocal on SI-mod-policy for long enough that any further comment is obsolete. It'll go how it shall go. Nothing to do about it. Time will resolve the issue. In Asia it would be called a Buddha-thing. Don't touch. Let Buddha do it. There is an appropriate statement in the christian bible as well.
vbg
Others might find thinking about it more useful than filing. However, chacun a sa facon. Feel free to file wherever it fits your needs. :)
K.
Wrt chipsets, yes for IGP, for additional comments going forward pls see post to WT.
I think the INTC answer to this will be "core" cpu on generation X, and celeron on X-1.
This would work perfectly in a monopoly. I doubt it works in a competitive environment.
I did not follow the thread lately, missed elmer's highly integrated thing. I'd appreciate a link to it.
K.
WT
I suppose they could still move production from 90nm to 65nm keep the process cycle going and the more expensive fab busy.
Yes. Look at scribbles Mike posted recently in this respect. (Apologies, i have ceased to even try to keep track of Intels codenames). One of the ideas seems to be integrating NB on chip by means of mcp and add SRAM into it to keep the diesize for an interim solution. Interesting. Makes some sense in business terms. However, on-die integration of mct is far more compelling imo - although it comes at a price.
K.
wbmw
I was getting at pad-limitations on the chipset, not CPU.
K.
lol
Scribbles Mike posted recently do not encourage me for an investment in this respect. :)
Otoh, coherent HTX 3.0 seems not easy to pull out of the hat either. :(
K.
I see. I am following the flash thing from a distance, so you might be closer to Intels plans in this respect. I learned Samsung is about to enter the NOR-pokertable beyond what it already has in terms of mcps (a way of admitting one-nand did not cut it). Wrt NAND, i assume "predominantly built in Micron Fabs" means except packaging NAND Intel does not manufacture Nand-Silicon currently.
Wrt pads, i was getting at chipsets, not CPUs. And i agree serial would be preferable. If you have ip for anything fast enough, i'd be interested in an investment.
K.
WT
What limitations of pads come in to play?
Intels chipsets currently have fourteenhundredsomething balls at a diesize of well over hundred sqmm at 90nm. Dies can shrink. Pads not, at least not easily. There are limitations for pad-pitches, for various reasons.
K.
alan
Right you are wrt 300mm mention. I have not much clue how much of the initial 300mm toolset can be used for 45nm, so i cannot rule out CPU in 11x. But i am still leaning more towards flash or grafics. If only as a gut-feeling, beside these considerations: http://www.siliconinvestor.com/readmsg.aspx?msgid=23321084
K.
alan
Wrt toolset, see post to vbg pls.
Wrt chipsets, i doubt Intel can convert these to 65nm before it integrates MCTs to CPU, due to pad-limitations.
K.
vbg
Shell and facilities account for a quarter of a fab investment at most. Initial toolset in 11x was for 130nm node and reused for 90nm. It's not a small fab, 243K sqft according to Intels data. I'd expect a capex well beyond 2B if Intel intends to ramp CPU there.
K.
Hi,
any clue what Intel plans to ramp in Rio Rancho?
Capex seems too low for CPU. Flash? Grafics?
K.
Mike
I got tired of plugging and unplugging stuff and packing and unpacking stuff everyday.
I understand. I can't avoid that, traveling a lot. Different lifes, different usage-models. Diversity. Good. :)
K.
Mike
On second thoughts, "Beyond notebooks" was premature. A pcmcia grafics card allows for a three-monitor-setup. No clue bout capabilities and affordability of those, though.
K.
Mike
Interesting. Displays might have the major walletshare in your user-model, then?
K.
fujii
http://www.hpcwire.com/hpc/1282253.html
Another context, same paradigm: "So one important metric for us is performance per watt per dollar."
I agree there is plenty of room for defining "performance" and "wattage". I am not sure i understand what you mean by "wall wattage". Could you elaborate on it?
K.
fuji
Hi, welcome to the thread
With 65/95W quad-core we should expect passive cooling
Passive cooling is limited to single digit watt numbers.
Keeping power envelope is more important than performance lead.
Power matters. Performance matters as well. Performance per watt considers both.
Beyond, cost matters as well. Performance per watt per dollar is an even better paradigm.
HT3 which obviously consumes more power.
I never thought about HT3 wrt power consumption. I don't think the increase in power for itself is significant. But it feeds the cores with more data in multisocket-systems, which could easily add double digit wattages. Maybe this is one of the reasons we won't see HT3-Opterons before next year.
K.
mike
I use three monitors at work and I'd like to keep it that way.
I like 1600x1200 + 2 x 1280x1024. One monitor for QuoteTracker,
one for engineering work and one for email and web browser.
Oh. Now i understand why you need triple monitor support. Beyond notebooks, certainly. Just curious, do you use three grafic cards for this configuration?
K.
Mike
Most laptops don't support triple monitor setups.
It does not even need dual monitor support (which most books support nowadays). Setup is no issue. Plug the monitor in - done. Plug it out and you are back to the display of the book. I adopted this usage-model about three years age and am pretty happy with it. No synchronizations needed from office/home/notebook boxes. Noise is an issue. I feel disturbed by it as well.
K.
mike
I'm leaning to bigger screens these days. I've been spoiled by large LCD monitors at work and home
So am i. Plug these to the book there.
K.
Mike
This one might fit your needs, memorywise.
http://uk.theinquirer.net/?article=37792
K.
smooth
Ah, this is it. It's her credibility, btw.
Honi soit qui mal y pense. :)
K.
Snow
K9's pretty hard to climb to the summit, I heard. But once you get there, you have a marvellous outlook. This must be it. :)
K.
Keith
Thanks. I see your point. I'm still not fully convinced though, frankly. If you google for AMD64 half-multiplier you find a mixed bag of reports 90nm parts can be manually set so, although it does only make sense if you also set memory-speed manually, and others claiming it cannot be done at all.
I remember a Brisbane (p)review had issues with memory-speed. And then, etail-Brisbanes at newegg were only sold bundled...
Bottom line, half-multiplier can easily be a board-issue.
K.
Keith
The 90nm 4000+ would have been 2Ghz/2MB L2, and has been phased out a long time ago.
Not stringently pointing to 65nm to me. I would not know what would hold AMD back from packaging this spec from 90nm. Besides, i would have expected Acer to mention 65nm if it were Brisbane.
K.
Keith
This one containing 65nm A64 X2.
I might have overlooked notion of 65nm. Could you point me pls?
Tx.
K.
Katie
The other way round, most probably: DELL took on AMD because Intel needed to show money previously paid to Dell for not carrying AMD to its stockholders. At least this is what DELL numbers insinuate. We'll certainly learn more about chicken and egg over time from ongoing investigations. However, Andy's statements about cost are certainly easier to understand considering this topic. :)
K.
Well, it's obvious people are running away from something.
From what is under investigation. Time will tell.
K.
http://www.marketwatch.com/News/Story/michael-dell-reassume-…
Replacing Rollins with Dell is the second major executive change at Dell in a month. On Dec. 19, Dell named board member and former AMR Corp. Chief Executive Donald Carty as its chief financial officer, taking over for Jim Schneider, who left Dell to become executive chairman of the board of Frontier Bancshares Inc.
Dell previously said its revenue-recognition practices are the subject of SEC and internal investigations, and the U.S. Attorney\'s Office in New York is investigating its financial reporting, The Journal said.
http://www.marketwatch.com/news/story/investors-sue-dell-pay…
K.
Hans
Appreciated. Actually, looking at technology-stocks as kind of Skinner-Boxes is the best thought-model i found so far.
K.
Mike
Microsoft has been incredibly slow in SIMD instruction support. Even the Intel compilers don't seem to be ready to go when there's a new SIMD instruction set out.
Well MS needs code that runs on the hardware base out there. Fast code for the newest 1% CPUs doesn't help Microsoft. First use of new instructions is usually in apps used for benchmarking. This code is also used to posish icc-versions aware of new instruction sets in its final development stages, i've been told couple years back.
K.
Alan, wbmw, Elmer, Wouter
Many thanks for sharing your opinions.
K.
vbg
110mm2 die size most other people are throwing around.
Sure. Design-target, after logik is at 45nm in a year. At current designpoint diesize is roughly at 135sqmm.
K.
alan
I fully agree. Slideware definitely looks better than silicon. :)
What's wrong with the suggestion you previously posted:
suggesting it is 79mm^2... which would be an outstanding die size result if they actually achieved that.
I'd rather go for this, if i were you. It's an even better picture. :)
K.
wbmw
It only shows the package of the product at a distance.
As long as you don't want to look closer, yes. All others zoom the package in the left hand in and use a ruler. PCB size is given, Penryn is a socket 775-product. Diesize-determination is simple math.
K.
wbmw
Yes. This should be the ballpark in a year. Current silicon is well beyond this figure, for the reason mentioned back in this thread. Scroll down for link, pls.
K.
http://hwzone.co.il/view-image/newspics/mor/save/intel_israel_2006/intel_israel_2006_roni.jpg
elmer
Thanks. Found the higher resolution picture. Hope this one works.
http://hwzone.co.il/view-image/newspics/mor/save/intel_israel_2006/intel_israel_2006_roni.jpg
K.
chipguy
it does not use expensive process tricks like SOI or extraneous layers of metal to provide MPU value added that can be extracted instead with highly intensive circuit and physical design optimization for each device.
Yes for the first part. The impression of the latter works as long as people believe "highly intensive circuits and physical design optimization" are useful. Physics are neither impressed by speech-bladders nor by a throwing money at it.
Besides, i had hoped for comment on the current diesize of Penryn.
K.
alan
If i understand it right, Intel basically develops its Semiconductors in the same way everybody else does nowadays. (While it might sound better better for you as everybody else develops in the way Intel does.) Either way, it is different from the way development had been done in the last millenium.
http://www.ixbt.com/short/images/intel_israel_2006_roni.jpg
I did not find a better resolution. Diesize.
Apart from this, we all project, occasionally. So i do as well. Not in this case though, i believe.
K.
Tiger
What would cause that low of a price level?
Cash worries, if the market does not understand AMD's strategy.
K.