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More drivel.
LOL!!! More excuses. http://www.commandercooler.com/
You're off by 1.5 years. General commercial release is scheduled for *January* 05. And there should be some news tomorrow:
Sun will likely provide more information on Solaris x86 when it launches Solaris 10 on August 17 at an event in New York. Although, as we understand it, the OS won't actually be generally available until January of next year.
http://www.theregister.co.uk/2004/07/15/sun_solarislives_opteron/
upc
if they say 65 in fab36 i'll take them at their word.
Saying, "65nm in Fab36," is not the same as saying, "No temporary 90nm in Fab 36." To my knowledge, the latter statement has not been made.
upc
Doing anything else with Fab 36 will delay it. The same engineers and technicians who are now focussed on 65nm would have to be 'borrowed' to get up the tactical 90nm lines in fab 36.
This is not clear at all. This assumes that everybody is always able to work to push the 65nm process forward. There will almost certainly be many steps along the way where many engineers are simply waiting.
upc
Not true. I have the Sunday BestBuy insert, and there are Intel HPQ notebooks and desktops as well as AMD systems.
What is true is that there was a separate HP back-to-school insert in the paper featuring only AMD systems:
7 HP AMD notebook configs (5 are A64s)
6 HP AMD desktop configs (2 are A64s)
4 Compaq notebook configs (2 are A64s)
3 Compaq desktop configs( 1 XP, 1 A64, 1 A64 939: Compaq X gaming PC)
upc
I was still an equipment tech in wafer sort/final test, way back then.
Isn't that what you do now, too?
upc
Could you be more specific? I'd like to know what compiler was used, and what processor the executable was optimized for. I'd also like specific methodology details for the "tests". HT does provide a small advantage in situations where poorly optimized code is being run (the core needs to be spending a significant amount of time waiting to do work for the overhead of HT to be worth it), but nothing like what this "review" would have one believe.
Regarding Anandtech, it really was too bad that when they actually compiled and optimized correctly, nocona lost, wasn't it?
With respect to superPi, they dropped it because they were using an executable pulled off the web of unknown characteristics. (Was it 32bit? 64bit? What compiler was used? What was it optimized for?)
It's no secret that Intel has always attempted to influence benchmarks to its benefit-- does a "review" like this in Infoworld really surprise you?
upc
For one thing Sempron is still going to be on 130nm at the end of 05
?
90nm Sempron and Mobile Sempron launch in H1 05.
http://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_608,00.html
The only Sempron left at 130nm will be the old K7-cored stuff.
upc
Yes, I see, although again, if the "big compile" takes 2 weeks instead of 3 months, that's a HUGE difference. 4 dependent "big compiles" in 2 months, instead of 1 year, for example.
upc
The actual facts are that the very benchmarks themselves are bogus, in addition to Randall's pay-for-play issues. Can you even describe them? How were they compiled? What architecture were they optimized for? What do they actually *do*?
upc
by talking about rocket lots
But wouldn't that be exactly what you would be running at first, until you thought the process was ready (or nearly ready) for volume production?
If the time from wafer in to feedback is a few weeks, not four months, that makes for much faster progress, no?
upc
So, if it were their goal to bring up a 90nm process on 300mm equipment before the 65nm process is ready, couldn't they be running *some* experiments *now* somewhere else? (On some 300mm equipment) In order to cut down on the surprises they get after waiting for the first wafers that would emerge in Fab36.
upc
Alan, I'm trying to understand exactly how different the 300mm equipment is from the 200mm equipment, and how that impacts the expected time to port a 90nm process. Is the 300mm stuff actually not capable of the same 'recipe', or is it just a matter of "re-tuning" for acceptable binsplits and yields?
upc
Wouldn't it help that this would be completely in-house? (No UMC involved, with the attendant caution about protecting as much IP as possible.)
upc
But surely, even moving from 200mm to 300mm, and recognizing the different equipment that move entails, it is significantly easier to port a well-understood 200mm 90nm process than to bring up a bleeding-edge 65nm process, no?
upc
Mr Engel, are you surprised that Intel can buy a bogus review in Infoworld? Why?
upc
The point is simply that *if* 90nm could be *cost-effectively* brought up on 300mm in Fab 36 before 65nm could be ready, it would be an option.
no risk, no rewards! You would choose the slow death over the prospect of glory.
Don't be ridiculous.
upc
Take a look in the mirror and reality-check those IPF fantasies.
upc
Not necessarily. If 65nm has a much higher likelihood of delays, poor yields, etc., i.e. higher risks, then the conclusion is unclear, and going with 90nm first might make sense.
upc
Science, we're talking about copying Fab30 to Fab36.
upc
They indicated that it was a totally new process development and they could not use copy exactly for this...
Well, okay not copy EXACTLY, but "TOTALLY new"? That just doesn't sound reasonable.
upc
I assume this would be the IBM 90nm process, as it is the only 300mm 90nm process available to AMD.
Why couldn't AMD port their own 90nm process to 300mm? Why must it be identical to IBM's?
upc
Once the fab is complete it takes a while to bring up a new process, but not as long to 'copy exactly' 90nm, as it were. Fab36 is due to be producing samples in H105, I believe, so if they wanted some extra 90nm in mid-05, I would think it would be doable.
upc
More excuses...
They were both from the same publication, so no - they were not independent.
LOL. Yeah, that's it!
One from zdnet.uk the other from Germany, six months apart, with different systems.
Excuses, excuses...
upc
Gosh, somehow you managed to omit most of the benchmarks where the crippled A64 system beat the Dothan system. Like every game other than the one you chose:
http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2129&p=10
Now how could that possibly have happened?
Accident, of course. <GGGGG>
Dothan performs right up there with Athlon 64 at half the power.
Mmmmm, No. It performs right up there with a *crippled* A64 system:
and limited ourselves to single channel DDR333 memory run at the same timings as the memory in the W360 (2.5-3-2-7).
upc
I've provided two independent experiments. You've provided nothing.
upc
I bet it would save the Prescott system even more.
I bet it won't.
upc
At which point, AMD will have well-scaled 8-core x86/x64 systems, and Intel won't.
upc
Not really. Clustering is somewhat orthogonal to the issue. The question there is much the same-- what is the size of each node? 1P? 2P? 4P? 8P? (12P like OctigaBay?). 2P has dominated there for much the same reason.
upc
Say 4-core single core or 8-core (4P) dual core, although I suspect that an Intel 4-core (2P) system will be starved for bandwidth.
upc
You should be more interested in the future size of the 4P x86/x64 market. And to forecast that accurately, you need to understand that the dreadful scaling of Xeon from 2P to 4P and 8P has been largely responsible for the relatively small 4+P x86 market. But with last quarter's introduction of 4P Opteron systems, we now have a much more interesting proposition for customers.
upc
Do you have a link to any Dell 4P EM64T server offerings?
Or any actually shipping 2P EM64T offering?
TIA,
upc
LOL. It really is amazing how the bees are in denial over Prescott.
Tenchu "doesn't want to bother" looking up Prescott power usage, and surmises it couldn't be more than 90W (!)
wbmw insists that two independent experiments measuring Prescott system power usage vs. A64 must both be flawed, despite reaching similar conclusions, because he simply doesn't like the answer.
upc
Too bad he botched the bit about "Odessa"-- it's "Oakville", Odessa got pulled in to 130nm and is the current 2700+/2800+ Low Power mobile A64 core.
upc
LOL!! If *you* are to be credible, you need more than just an assertion that prescott couldn't possibly be that hot.
Face it, it is!
Why do you think 4GHz was delayed into 2005?
upc
Nothing like denying the reality of two *actual* power measurement experiments with similar conclusions.
Here's the old one, with a slower Prescott.
http://reviews.zdnet.co.uk/hardware/processorsmemory/0,39024015,39145079-2,00.htm
upc
it only points to one thing - the data is wrong.
No, it points to you living in a Prescott-Power fantasy land.
Unless of course you mean "Intel TDP data" by "data". In that case, you're probably right. <GGG>
upc
The simple link had already been provided in the thread. <GGGG>
upc