Replies to post #131774 on Intel Corp (INTC)

[Unkwn]

I find it interesting that the A7 is so deeply pipelined for a relatively low clocking part.

Yeah, I found that puzzling as well, I would have expected A7 to have a much shorter pipeline. Though, at a second thought, considering that they'll likely use the slower low power process edge (I suppose TSMC would tune their process for a customer like Apple) and that they go quite low with the voltage (something the 1,3 GHz tells me) it makes sense. All these measures typically affect timing in a negative way and you need the longer pipeline to compensate for that. Basically the same rules apply, whether you are developing a CPU for +3GHz at a power consuming high performance process or one for low power applications with a low power process - timing gets critical for both.

Kind of funny to see that the same design optimum for mobile and high performance seems to basically be the same core structure (oversimplified, I know). If Intel would just strip down Haswell - they would lead the market already. I really hope Goldmont ist basically that, otherwise it might be too late for that step.

That is likely a requirement to achieve relatively low voltage/
power for a wide CPU built in non Intel process technology.

Well, the same physics apply for Intel as for everyone else. No magic there either. Finfets may help, though. Again, the same measures that help at high performance seem to help at low power.

[mas]

I suspect they anticipate unleashing more clockspeed with future derivatives at smaller lower power processes e.g. 20nm, 16FF etc.