Replies to post #70800 on Advanced Micro Devices Inc (AMD)

[chipguy]

The K8 L1 architecture was inherited from the K7.
It was originally designed for a K7 born when only
one level of on-chip cache was possible.

AMD doesn't have the manufacturing capacity or
design experience to go for monster add on L3s like
Intel uses in its x86 line. To maximize performance
with reasonable area constraints AMD should really
redesign a three level cache hiearchy from scratch.
L1 design is tightly integrated within the CPU layout
and pipeline design of any processor. So it doesn't
make sense for AMD to spend the effort at redoing
the cache hierarchy until it redesigns the CPU core
itself.