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sarals

04/15/03 12:06 PM

#4699 RE: chipguy #4698

Intel finds possible glitch in new chip
Company cancels market introduction of latest Pentium 4

Matthew Yi, Chronicle Staff Writer Tuesday, April 15, 2003

Intel Corp. has pulled the plug on the introduction of its latest Pentium 4 chip after finding a possible glitch in the new microprocessor.

The 3 GHz Pentium 4 chip was to have been released Monday along with a new chip set, which can transfer data faster between the microprocessor and the memory.

The Santa Clara firm, which will announce its first-quarter results today, introduced the 875P chip set on Monday as planned, but decided to stop shipment on the Pentium 4 chip after an anomaly was discovered during testing, Intel spokesman Howard High said.

It'll take a few days for Intel engineers to pinpoint the problem, which has been cropping up in random instances, he said.

Kevin Krewell, a senior analyst at the industry research firm Instat/MDR, said he believes the problem has to do with what is called the chip's system bus, a connection that allows the processor to send and receive data from the memory.

Although the new microprocessor runs at the same clock speed as Intel's top Pentium 4 chip, its ability to transfer data at 800 MHz is supposed to increase performance when compared with the existing versions that run at 533 MHz.

In terms of making the repairs, the best-case scenario would be a software glitch, which can be fixed within a couple of weeks, Krewell said. The worst- case scenario would be a problem with the chip design, which could take as much as three months to solve, he said.

"Every (chipmaker) runs into these things. It's part of the price of doing business," Krewell said.

The last time Intel had to stop shipments on a new part was two years ago when it recalled its 1.13 GHz Pentium 3 chip and later replaced it with a 1.1 GHz version, he said.

Intel's main rival, Advanced Micro Devices, also has faced delays, most recently in the desktop and notebook computer versions of its new generation of microprocessors code-named Hammer. Those parts are scheduled to be released in September, although a server version is to be released next week.

Michael McConnell, an analyst at Pacific Crest Securities, said that with AMD also facing delays, the financial impact of Intel's latest glitches should be minimal.

"It's not a big deal. . . . Although the caveat is that they're going to disappoint some (computer makers that have been waiting for the new chip)," he said.

McConnell doesn't own Intel shares and his firm doesn't have investment banking business with the chipmaker.

Mark Edelstone, an analyst at Morgan Stanley, agreed the delay is not a big blow financially, but added "it's certainly embarrassing to introduce a new product and to recall it right away."

He doesn't own Intel shares, but Morgan Stanley does have investment banking business with the chipmaker.

Intel shares gained 40 cents, or 2.39 percent, to close Monday at $17.16, but dropped 6 cents in after-hours trading.

The firm is expected to report a profit of 12 cents per share after the markets close today.

http://www.sfgate.com/cgi-bin/article.cgi?file=/chronicle/archive/2003/04/15/BU180732.DTL

Elmer Phud

04/15/03 12:27 PM

#4700 RE: chipguy #4698

Chipguy -

To Dan3: Can you point to any reports of data corruption involving the 3.0 GHz P4? Once again you demonstrate your fleeting acquaintance with the truth.

Just figuring that out? I wouldn't be as polite as you. I ignore him because he's a liar.

All we know is that Intel halted shipments. There are a variety of reasons that this may have been done. But at this late stage of the game it is IMO most likely because the ATE guard band on some minor data sheet spec had been set too aggressively and some samples showed up that failed this spec for one of the operating condition corner cases.

Maybe but I doubt this is the actual reason. It is more likely a new speedpath recently discovered that needs to be added to the vector set. Speed path analysis is not an exact science. Speed limiters are discovered empirically and no doubt the new FSB speed introduced a new one not seen before. I'm guessing that the delay is to allow a rescreen of existing material.

Dan3

04/15/03 5:57 PM

#4722 RE: chipguy #4698

Re: Can you point to any reports of data corruption involving the 3.0 GHz P4?

The post was meant to be lighthearted, and was followed by a smiley. I thought it was a suitable reaction to all the boasting going on about how great the new chip was.

But lets look a little more closely. What problems are manifested as CPU problems?

The most common is the "doesn't boot every time" after a warm reset, or a cold boot (or both). This is bacause the most sensitive time for a CPU is when its multiple on board clocks are first starting up, and if one of the clocks "wakes up" out of order, the PC won't boot. You hit reset again, this time the on-board capacitors are still partly charged, and the machine boots fine. There have been systems like this, with problems like this, from both Intel and AMD (it's usually a motherboard problem, not a CPU problem, but a new CPU can often exacerbate the problem or cure it).

If a PC boots (and none of the testers reported any trouble) another thing it can do is hang, which will sometimes cause data corruption (and wasn't reported by any testers), or it just flat out silently makes a error 1 in a billion times or so, which will evenutally (maybe immediately) corrupt data.

Bottom line is that CPUs either have trouble booting, or they're perfect, or they corrupt data.

The new P4's boot fine, which leaves perfect or corrupts data. The new P4's were pulled, so they aren't perfect - that leaves corrupts data.

Judging by the lack of problems seen by testers, it's a 1 in billions event, but apparently it sometimes happens.

I love some of the careful wording like "It's only a speedpath error." The chips clocked fine, so a speedpath error means the chip was producing errors in its calculations, and that's how data gets corrupted. Or, "It's just an anomoly", as if an "anomoly" that makes the chip give the wrong answer is OK!

There were some Sparc chips that SUN shipped a few years ago in which a cache error was found after the chip was first benchmarked. SUN had to back off the cache timings (at first, they disabled one of the caches completely) and you should have heard the Intel guys whining about how SUN was cheating on their Spec scores etc. (SUN left posted their Spec scores from chips with the cache enabled at full speed until Intel demanded that they be taken down. Funny that Intel's PR bunnies aren't whinging bout the Spec scored from their own "anomolous" chips.