Intel says all what you post. But it explicitely attributes these features to "Intels Next Generation Micro-Architecure**" and are well covered by the footnotes on slides 9, 10 and 13 for anybody making anything else out of it.
I'm not sure what you are trying to say here. That the slides show features that are not in Merom? Or that Yonah is also part of this Next Generation Micro-Architecture?
On the pipeline thing, current Pentium-M is Dothan, not Yonah.
Agreed, the pipeline argument is weak because Yonahs lenght has not been disclosed.
This would imply your premise EMT64 needed new silicon as well, am I right?
Prescott was designed with 64 bits in mind all along, only Intel kept it disabled for a while for a varyity of reasons. Still it was very obvious that it was in there, as it could be derived from common sense, consistent reliable rumours and analysis of the die pictures.
Yonah was already being developed (at least on the roadmaps) about a year before Intel decided to scrap Tejas. That means Yonah was conceived as a pure mobile part, for which Intel has said that 64 bit doesn't make sense, mainly because of the extra power usage. Now you could say they have changed their mind in the mean while, but back then (we are talking 2003 here) I don't think Intel set out to develop 64 bit mobile core. I believe the main reason for the fact that Merom was pulled in from H1 2007 to H2 2006 is Yonahs 32 bitness.
News 
Market Data 
Discover 
