the most interesting thing is the big L3 cache bus. I wonder where that might be leading.
It's no secret that Intel uses the same base die for their Xeon products. With the L3 interface they are positioned to add cache cells for the large cache MP Xeons. With a tiny die size of 87mm (according to the article) they could easily add L3 to their desktop version should AMD actually be able to produce a competitive Hammer. Hypothetically speaking of course. This is just an extension of the NorthWood which I believe does the same.
Spokeshave, actually I have been here a while. Umm, lets see, signed up 5/12 of last year. The posting rate has been so low, I haven't really bothered except for a few initial posts.
When I have time, i am going to pour through Han's article. Not today, though...
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