Replies to post #63147 on Advanced Micro Devices Inc (AMD)

[chipguy]

In summary, at 130nm Intel reports SOI as gaining between 10% and 15%, this drops to between 12% and 6% at 90nm, and down to between 3% and 10% at 65nm. The difference between the two numbers is a requirement in some circuits for a history guardband. So Intel has said there is performance gain in SOI, just not enough for them to justify the cost. Of course, with the gain from SOI an ever decreasing number it does not make much sense for intel to start using it at the 45nm node.

I think what many people also forget is two companies with
very different circumstances can look at the exact same set
of design vs process trade-offs and come to opposite but
fully valid conclusions - for themselves - about which way
to go.

The final performance that any MPU design achieves in a
given process is a function of design effort. If you spend
more effort on design through extensive manual tuning of
nets, routes, and circuits etc you can get 10 or 15% more
performance at no additonal manufacturing cost.

Conversely a process adder like SOI might get you 10%
or 15% more performance at little extra design effort (*if*
the design targeted SOI from the start and the MPU team
knows what the hell they are doing) but at say 20% higher
per unit manufacturing cost.

Consider Intel vs IBM. Intel might design a processor core
with 100m life time sales in mind while IBM perhaps 1m.
Consider the following trade-offs that obtain the same MPU
performance for the sake of argument:

A) Bulk CMOS: $500m NRE, $50 per unit cost
B) SOI CMOS: $300m NRE, $60 per unit cost

Total average cost for Intel:

A: ($500m + $50*100m)/100m = $55 per unit
B: ($300m + $60*100m)/100m = $63 per unit

Total average cost for IBM:

A: ($500m + $50*1m)/1m = $550 per unit
B: ($300m + $60*1m)/1m = $360 per unit

It is clear that Intel would stick with bulk CMOS and
expend more design effort while IBM clearly would go
with a process based product enhancement that limits
engineering effort over a relatively low volume part.

The interesting thing is AMD kind of sits in the middle
between Intel and IBM in this NRE vs manufacturing
cost trade-off. Let's say AMD has a target of 20m life
time sales:

Total average cost for AMD:

A: ($500m + $50*20m)/20m = $75 per unit
B: ($300m + $60*20m)/20m = $75 per unit

The choice of SOI vs bulk was likely much less clear
for AMD than it was for either Intel or IBM. In the end
it probably boiled down to the fact that AMD was buying
its process technology from IBM and IBM was going
down the SOI path.

[bobs10]

Nice post, lots of good information.

Also, keep in mind that CPU die sizes will be about the same at 65nm as 90nm due to the shift to dual core.

Me...

Good point.
I know INTC seems totally committed to DC, but I remain somewhat skeptical about the value for consumers. This is based mostly on the lack of multi threaded programs and the sense that computers have grown so powerful that price is becoming the dominant check-off. The DC problems seem to be similar to the problems 64b adoption has gone through. Both are logical upgrades, but both are waiting on software to catch up to hardware. Both DC and 64b promise immediate processing improvement for different reasons, but seem more suited for users that really tax their machines. In the laptop area DC seems like a liability. We'll have to see how well the chips (Meron) and the ultra-low power chips INTC has said will appear at 65 nm handle heat and power demands.

As far as SOI goes, I thought I read that INTC didn't see much use for it until the 45nm level. What your saying is that at 45 nm and below INTC thinks it has no value.

Perhaps for INTC's processes they're correct, but something seems to be working for AMD.

Well like I've said I'm not technical and although I can understand this stuff at a certain level, I make no claims to really understanding it. I'll leave that to the more technical people on the boards. In the end though I basically have to wait for reviews from Anandtech and such to get a clear picture of how well the chips perform.

So I'm still a little confused as to what you think INTC will be filling up all the new fabs with. Granted DC will take some of the space but not that much and fabs don't get better with age. Is it going to be wireless stuff? That seems most likely, but INTC has been fighting TI for years in that market and as yet doesn't have a toe-hold. Or is it Wi-Fi/Wi-Max that INTC intends to dominate with its' platform strategy, or something else?