subzero
Please explain and elaborate, OK? Does this mean that memory accesses using the hypertransport (from adjacent CPUs) do not also access the extra ecc bits to perfrom ecc after the read operations are complet?
An aHT link is 16bits wide in each direction. For aHT, data integrity is maintained by means of a CRC at the end of each packet. Unlike a buss with ECC, if there is a bit error the entire packet must be retransmitted. With ECC, a bit error can be corrected on the fly.
EP