Re: Intel obviously had trouble with 90nm besides P4 design because Dothan was delayed about as much as Prescott, because leakage was higher even in a low voltage design then they had anticipated. Intel would not have delayed if they hadn't faced an issue with Dothan. From what I heard it was exactly the same issue (leakage) that delayed both. From another angle: Intel would never have created Prescott if they'd known about higher than expected leakage beforehand. Íntel's 90nm problems were magnified for all to see with Prescott, but they applied to their other products too (same process with higher than expected leakage) but in a lesser manner because voltage and frequencies (and hence leakage) are less than with Prescott. Same problems, but in a less excessive manner.
I've heard better ways of explaining Intel's schedule with Prescott and Dothan than the one you propose. To get to the point, I don't think leakage was "the" issue, just a contributor in the beginning. If you look at Intel's 65nm slides, you can see that 90nm was "fixed" part way through, yet now, Prescott is still a power hog, while Dothan is rather cool and modest.
This points to a fundamental micro-architectural difference, rather than anything broad based like the process. Prescott was designed to be a top performer without regards to power. I think Intel would have to know what to expect from the process, but maybe they overestimated their ability or the industry's to deal with it. If people didn't mind buying 150W parts, Prescott could probably scale a lot higher, but the market put the stake in the ground, and Intel had to cut things short.
In short, that's not a process problem, it's a micro-architecture issue that's too late to fix. That's probably why Intel is going with mobile inspired cores for future micro-architectures.
By the way, I found this rather interesting, which is a comment in regards to future desktop processors:
Intel engineers also pointed out that 60 watts would be "on the horizon" and they could not say which products will achieve this power level in which timeframe.
I think anyone privvy to current rumors ought to be able to make an educated guess. My money is on the Conroe part leaked by the Inq, which may be a Yonah derivative with EM64T and more aggressive clock scaling, 4M cache, serial FSB, integrated memory controller, etc. If at least most of these can be on a 65nm process with 60W power envelope, it would be a good sign that Intel has process parameters under control.
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