Replies to post #49436 on Advanced Micro Devices Inc (AMD)

[j3pflynn]

chipdesigner - Maybe he thinks they can build a power efficient chipset with a memory controller that runs at 2.5GHz too. Not.
;)
Paul

[pgerassi]

Dear Chipdesigner:

If he was really serious about Sis making better controllers than AMD, all they would need to do is add one or two in their NB part of the chipset. AMD can use off chip memory controllers with HT, cHT is only needed because they connect to off chip caches in the other CPUs. So Sis can prove their memory controllers are superior. They can even be compared to access time wrt remote 2P memory access times. I think that Sis can't do it better than AMD, else they would do it. You know there would be a lot of MB manufacturers that would use a chipset allowing 8 unbuffered DIMMs on a one socket MB. Getting 10.4GB/s BW, 45-50ns on die and 50-55ns access latency off die (off die 16/16HT at 1GHz is slower than on die 32/32HT at 1.8-2.6GHz) with 8GB of LL PC3200 is better than 6.4GB/s,45-50ns and 4GB LL PC3200.

But since Sis doesn't, they likely can't do better and they know it.

Pete

[bobs10]

yes, clearly the trend is to bring critical functions as close to the processor as possible, particularly things that improve latency. I wonder how much longer it will be before we start seeing full performance GPUs incorporated into the processor?

Still the chipset isn't going away any time soon, particularly the SouthBridge with its' interface to PCIe. The NorthBridge, on the other hand, seems ripe for extinction as MCs inevitably move to the processor.