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blauboad

10/15/04 1:22 AM

#45806 RE: fastpathguru #45796

BTW, doesn't it cost a lot more to build a 2M cache part, and increase the die size?

They have to do something with all that fab capacity. The big costs are fixed.

BTW, I seem to be in the minority here, but judging by the overclockability of the P4, and BTX on the way, it seems to me that Intel's explanation is plausible.

Right now, the P4 platform really could be more improved by other things than clock boost.
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yourbankruptcy

10/15/04 7:49 AM

#45812 RE: fastpathguru #45796

FPG, the 2 Mb P4 part will greatly improve the output of 1 Mb parts with half cache working. Intel problem is binsplits - for every good P4 3.4 they make a whole bunch of 2.8 and even 2.4, which are dusting as inventories. This will dramatically improve.
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chipguy

10/15/04 10:12 AM

#45819 RE: fastpathguru #45796

BTW, doesn't it cost a lot more to build a 2M cache part, and increase the die size?

Have you ever seen a photo of the Prescott Die? The 2
MB Prescott will probably still be smaller than Northwood.
Compared to the 1 MB device, the 2 MB will only cost a
few dollars more. A pretty good trade-off considering
that (along with the 1066 MHz FSB) it basically bumps
the performance to the same or more than a 4.0 GHz,
1 MB, 800 MHz FSB Prescott for a far smaller power
increase and little or no binning loss vs the current 3.6
GHz, 1 MB, 800 MHz P4E.