Replies to post #42203 on Advanced Micro Devices Inc (AMD)

[alan81]

90nm on 65nm process?
by this I assume you mean they run the 65nm process as designed, but for the products they keep the design rules at the 90nm level. This would result in the same die size as 90nm, and perhaps the same performance as 90nm.

I think this is a very bad strategy as you would get none of the benefits of 65nm, and still take almost all the risk. The risk is not really in printing 65nm lines as probably everybody can do that today. The risk is in the thinner gate oxides, the shallower junctions, the new low-k dielectrics, the strained silicon, and the million other little process integration issues. Sure, you would reduce the risk a little by not allowing anything be drawn to the minimum design rules, but I think it a very small amount.
--Alan

[Tiger64]

Well...if Napoleon came up with double time I think Hector will come up with triple time...i.e. working 24 hours a day to finish fab 36 interior...cost is not relevant at this time...time is more relevant...no?...;>)