wbmw, upc, that slide 4 -
1. Does it affect other 90nm processors besides Prescott? Undoubtably it does. One cannot tell from this diagram where the leakage is going, it will be interesting to see if SOI mitigates this problem. So far it is unclear, but we will be able to make some comparisons when AMD's product is shipping for a quarter or two (and the process is refined).
One thing we have established from this very interesting thread is that leakage does increase with heat, which helps explain the far different power requirements of Prescott vs. Dothan. Prescott, of course, will run hotter because of higher clock rate. This leads to more leakage, which means more power required - feedback loop!
Dothan and AMD processors, of course, avoid this issue.
2. The chart shows active leakage at 0.1m (~90nm) is substantial at just under half the total power requirement. However, leakage at 0.7m (~65nm) starts to overwhelm active power - accounting for an astounding 2/3 of the total!
I take this as an early warning by Intel that they expect more severe leakage and power issues on 65nm.
Now, both Intel and AMD are moving to multiple cores to improve performance (something that takes advantage of 65nm without necessarily increasing clock rate). Until significantly new processes are developed it looks like we are hitting the clock rate wall.
Technically, Moore's Law still holds since it is an assertion about density of transistors (not clock rate), although the clock rate increases that have been spoiling us are going to be harder and harder to achieve. Both Intel and AMD will have to be creative about adding value in this new world or watch their ASP structure collapse towards the bottom as the clock rates start to bunch at that wall.
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