chipguy, I guess that means that Sun and HP are absorbing all the production of Opteron!
(It is also another boot up into the low volume boutique market for Itanium.)
It will be fun to see Sun Opteron and IBM Xeons matched head-to-head. Server benchmarks are expensive and difficult to run, but we should see some released this summer!
Ahead of the Curve Nocona pulls a fast one Intel asks customers to put their faith in a stopgap architecture
By Tom Yager August 02, 2004
As a Xeon, Nocona is a honey of a power boost: fat cache; fast clock speed; smaller, denser die; and faster front-side bus. Intel’s engineers busted hump to make Nocona Intel’s best Xeon CPU. It’s a shame that this laudable effort will be overshadowed by the last-minute inclusion of EM64T, Intel’s 64-bit extended memory architecture. The Nocona EM64T-equipped server CPU, and its desktop counterpart Prescott, are precisely the “64-bit instructions strapped to 32-bit CPUs” that Intel warned against when Pentium 4 Xeon was launched.
Were EM64T sold for what it is — x86 with a wider address bus and larger register set — I’d have no complaints. But Intel hopes to use EM64T to blunt the market’s growing interest in genuine 64-bit value servers and power desktops. These aren’t waiting around the corner. They’re here now, constructed around AMD Athlon 64 and Apple/IBM/Motorola PowerPC technology. But make no mistake: A 64-bit system requires a new system architecture (as AMD and Apple have created), not a new processor.
What characterizes a 64-bit system? Multiple independent I/O busses, on-chip memory controllers, and very highly integrated peripheral chip sets that eliminate the need for the many discrete single-purpose chips common to PC designs — along with the slower, noisier circuits between them. Sixty-four-bit systems are technically simple compared with PCs’ convoluted, legacy-bound designs. It took AMD several years of obsessive engineering to create Hammer (the former code name for the Athlon 64/Opteron line). Apple had to create a new 64-bit system, almost entirely of its own design, to build around the PowerPC 970; Apple earned the right to put the G5 brand on the architecture.
Hammer and PowerPC G5 have a vital trait in common that Nocona does not share: They were engineered as legitimate, pure 64-bit architectures. When this approach is taken with customers’ needs in mind and applied to the entire system, 32-bit compatibility naturally comes along for the ride. This is not an objective one can achieve by building on top of an architecture that is already well beyond the limits of its design. When Itanium was engineered, it was clear that x86 was heading for the wall. Future applications would demand high speed outside the CPU die as well as inside, performance characteristics that were, at the time, seen only in very expensive 64-bit systems. The incredible foresight behind that strategy was so badly botched in execution that when Xeon’s term expires, Itanium will not be in position to take over.
So here we have Nocona, Intel’s would-be placeholder. Intel said in advance that it doesn’t believe in this architecture. Neither do I. Nocona is, at best, a 32-bit Opteron emulator. Nocona will do well enough on 32-bit published benchmarks for a while to make those who aren’t readers of this column wonder what all the Opteron and G5 fuss is about. But during the next six to 12 months, while operating systems and I/O-intensive apps start flipping the 64-bit switch, users who already have true 64-bit AMD and G5 systems will get the total performance designed into these architectures. Those with EM64T systems will get what Intel designed into their systems, too. Why, they’ll ask, didn’t someone tell them nothing would happen when they flipped Nocona’s 64-bit switch? Isn’t it fun to know something that others don’t?
The Nocona feature that has grabbed the most attention, Intel’s new EM64T (Extended Memory 64 Technology), might be the least interesting. EM64T breaks the 4GB RAM barrier associated with all x86 processors (except Nocona, Prescott, and AMD’s Athlon 64, Athlon 64 FX, and Opteron chips). Basically, Intel created a hack for using chunks of memory above the 4GB mark that will effectively reduce the system’s contiguous address space. Yes, developers will be happy to see a big address space for their new 64-bit apps, but Intel’s system architecture will likely hamper, not improve, performance as more RAM is added to the system.
In the end, Nocona is a Xeon killer not an Opteron killer. The fine points of chip architecture aside, differences at the system level relegate Nocona to the dual-processor bush league. For example, Intel could not match the glueless I/O system. Processors in an Opteron server talk directly to one another without going through the silicon intermediaries forced by Intel’s design. Likewise, Opteron links each CPU directly to memory, and Opteron systems’ memory bandwidth scales upward with the number of CPUs. Nocona’s bandwidth remains static.
Nocona’s design is Intel’s best yet. It’s a beautiful Xeon. But to catch Opteron, Intel would have to ditch its time-honored system architecture. Given where Itanium has (or hasn’t) gone, and the incredible pace at which AMD is advancing its technology, Nocona looks like a well-manicured rest stop alongside the very bumpy road that Intel faces.
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