Replies to post #40562 on Advanced Micro Devices Inc (AMD)

[CombJelly]

"IF amd has the capacity, where is it?"

Good question. I will point out that AMD has shown signs that they are trying to free up capacity for some reason or another. For example, the Sempron line emphasises 256k L2 caches. In the case of the SocketA chips, that enables them to reduce the number of wafer starts for that product by over 25%. Of course, we don't know what percentage of overall wafer starts were/are Semprons, so it might not amount to much. In addition, the Socket754 Semprons (assuming they are not just cache disabled) have almost 75% more good die per wafer(assuming a DD of 0.3) than an Opteron with 1 meg. of L2 cache(which almost all K8s were until recently). HPaq seems to like this chip a lot. NewCastle, with its 512k of L2 cache, should have 50% more good die per wafer than an Opteron. I doubt if they would be worrying so much about optimizing die size if they weren't close to capacity. By taking these steps they could easily increase the number of K8 chips produced from ~1 million (+/- a hundred k or so) per quarter to ~2.5 million (ditto). And this without reducing the number of SocketA chips produced.

[sgolds]

Duke, yes, I would imagine that AMD would starve the independent market in order to build a safe backlog for a large commitment by HP. It is a balancing act. They are trying to time manufacturing increases with OEM commitments; presumably, fresh manufactured supply will ease the pinch on the independents soon. Since the wafer starts for August supply would have started in May/June, AMD knows how soon they can rescue the independents.

They have to make it all come together for the back-to-school supply next month.

That just happens to be when 90nm starts hitting the street. The calvary is coming!