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jhalada

06/15/04 4:39 PM

#38057 RE: fastpathguru #38056

fpg,

I seriously doubt that that image is real... Look at the regularity and lack of detail in the exec cores.

I was wondering about that.

Joe
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j3pflynn

06/15/04 6:22 PM

#38058 RE: fastpathguru #38056

fpg - it could well be real, just radically pixellated, in order not to give away anything they don't want to yet.
Paul

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DDB

06/16/04 12:42 PM

#38111 RE: fastpathguru #38056

fastpathguru - Synthesis tools create such pics. That's the reason why I wrote "pic" and not "photo" (as I did for real die photos). And I doubt, any marketing guy would be experienced enough to make such a pic ;)

But believe me: Although the resolution is not as high as of AMDs large Opteron die photos (which is about 1700 x 1100 pixels), it is high enough to identify different parts of the core (e.g. the HT links, L2, MCT, DDR interfaces).

BTW: would a marketing guy mirror the second core (as it has been done with POWER4, POWER5 and maybe also the dual core Ultra SPARC)? Would he remove the second MCT? Would he move the left HT link into the middle and remove one of the clock generators?

The die plot - as it has been shown on that dual core pic - would take up about 208 mm².

I wonder, what the right part of the MCT does. On the Opteron market die photo at http://www.anandtech.com/cpu/showdoc.html?i=2081 it starts at the first "l" of "Controller" and this part is the only one left on the second core.