Replies to post #86089 on Advanced Micro Devices Inc (AMD)

[chipguy]

IPF gets its big SPECint_base2006 scores from its huge caches.

The biggest cache accessible to one core in an IPF MPU
is 12 MB. The biggest cache accessible to one core in an
x86 MPU is 16 MB in Tulsa. By your logic Tulsa must be
a monster in SPECint_base2006. Go look it up genius.
BTW, do ypu predict a performance drop from Montecito
to Tukwila? The cache per core goes from 12 MB to 6 MB.

The 2 socket blades require a blade rack plus the OEM markup on the CPUs themselves is over 100% (over double the supply price) Thus 2S rack costs $13K with 4GB of memory and has less than $1K of CPUs in it (2 gets $14K with $2K of CPUs) for about 7.5% (14% with 2) (Thats a 9010 1.6GHz/3MB L2):

http://www.google.com/products/catalog?hl=en&q=Itanium+2+server+1.6GHz&cid=9113511524447458734#ps-tech-specs

LOL, 1) an HP BL60p blade server is not the system of
choice for HPC work, 2) no one pays list price qty 1
when they build an HPC cluster genius. I have seen
some of the briefing material SGI's VARs get. I know
what their bottom line is for an A450 with two 9040s in
it.